HEF4081B Quad 2-input AND gate Rev. 8 15 December 2015 Product data sheet 1. General description The HEF4081B is a quad 2-input AND gate. The outputs are fully buffered for highest noise immunity and pattern insensitivity to output impedance variations. It operates over a recommended V power supply range of 3 V to 15 V referenced to V DD SS (usually ground). Unused inputs must be connected to V , V , or another input. DD SS 2. Features and benefits Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Inputs and outputs are protected against electrostatic effects Specified from40 C to +85 C and 40 C to +125 C Complies with JEDEC standard JESD 13-B 3. Ordering information Table 1. Ordering information All types operate from 40 C to +125 C. Type number Package Name Description Version HEF4081BT SO14 plastic small outline package 14 leads body width 3.9 mm SOT108-1 4. Functional diagram < < < < Q Q< Q% DL D Fig 1. Functional diagram Fig 2. Logic diagram (one gate) DDJ % % % % HEF4081B NXP Semiconductors Quad 2-input AND gate 5. Pinning information 5.1 Pinning 9 % (+ ) 9 Fig 3. Pin configuration 5.2 Pin description Table 2. Pin description Symbol Pin Description 1A to 4A 1, 5, 8, 12 input 1B to 4B 2, 6, 9, 13 input 1Y to 4Y 3, 4, 10, 11 output V 7 ground (0 V) SS V 14 supply voltage DD 6. Functional description 1 Table 3. Function table Input Output nA nB nY LLL LH L HL L HHH 1 H = HIGH voltage level L = LOW voltage level. HEF4081B All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 8 15 December 2015 2 of 11 DDJ 66 % % < < < < % %