INTEGRATED CIRCUITS 74ABT373A Octal transparent latch (3-State) Product specification 1995 Feb 17 IC23 Data Handbook Philips Semiconductors Product specification Octal transparent latch (3-State) 74ABT373A FEATURES DESCRIPTION The 74ABT373A high-performance BiCMOS device combines low 8-bit transparent latch static and dynamic power dissipation with high speed and high 3-State output buffers output drive. Output capability: +64mA/32mA The 74ABT373A device is an octal transparent latch coupled to eight 3-State output buffers. The two sections of the device are Latch-up protection exceeds 500mA per JEDEC Std 17 controlled independently by Enable (E) and Output Enable (OE) control gates. ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model The data on the D inputs are transferred to the latch outputs when the Latch Enable (E) input is High. The latch remains transparent to Power-up 3-State the data inputs while E is High, and stores the data that is present Power-up reset one setup time before the High-to-Low enable transition. Live insertion/extraction permitted The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active-Low Output Enable (OE) controls all eight 3-State buffers independent of the latch operation. When OE is Low, the latched or transparent data appears at the outputs. When OE is High, the outputs are in the High-impedance OFF state, which means they will neither drive nor load the bus. QUICK REFERENCE DATA CONDITIONS SYMBOL PARAMETER TYPICAL UNIT T = 25C GND = 0V amb t Propagation delay 3.2 PLH C = 50pF V = 5V ns L CC t Dn to Qn 3.6 PHL C Input capacitance V = 0V or V 4 pF IN I CC C Output capacitance Outputs disabled V = 0V or V 7 pF OUT O CC I Total supply current Outputs disabled V =5.5V 100 A CCZ CC ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 20-Pin Plastic DIP 40C to +85C 74ABT373A N 74ABT373A N SOT146-1 20-Pin plastic SO 40C to +85C 74ABT373A D 74ABT373A D SOT163-1 20-Pin Plastic SSOP Type II 40C to +85C 74ABT373A DB 74ABTD373A B SOT339-1 20-Pin Plastic TSSOP Type I 40C to +85C 74ABT373A PW 7ABT373APW DH SOT360-1 PIN CONFIGURATION PIN DESCRIPTION PIN NUMBER SYMBOL FUNCTION 1 OE Output enable input (active-Low) OE 1 20 3, 4, 7, 8, 13, V CC D0-D7 Data inputs 14, 17, 18 Q0 2 19 Q7 2, 5, 6, 9, 12, D0 3 18 D7 Q0-Q7 Data outputs 15, 16, 19 D1 4 17 D6 11 E Enable input (active-High) Q1 5 16 Q6 10 GND Ground (0V) Q2 6 15 Q5 20 V Positive supply voltage CC D2 7 14 D5 D3 8 13 D4 Q3 9 12 Q4 GND 10 11 E SA00059 2 1995 Feb 17 853-1454 14852