74AHCT132BQ,115 NXP

74AHC132 74AHCT132 Quad 2-input NAND Schmitt trigger Rev. 7 3 July 2020 Product data sheet 1. General description The 74AHC132 74AHCT132 is a quad 2-input NAND gate with Schmitt-trigger inputs. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. 2. Features and benefits Wide supply voltage range from 2.0 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity CMOS low power dissipation Input levels: For 74AHC132: CMOS level For 74AHCT132: TTL level ESD protection: HBM JESD22-A114E exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101C exceeds 1000 V Latch-up performance exceeds 100 mA per JESD 78 Class II Level A Multiple package options Specified from -40 C to +85 C and from -40 C to +125 CNexperia 74AHC132 74AHCT132 Quad 2-input NAND Schmitt trigger 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC132D -40 C to +125 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74AHCT132D 74AHC132PW -40 C to +125 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74AHCT132PW 74AHC132BQ -40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal SOT762-1 enhanced very thin quad flat package no leads 74AHCT132BQ 14 terminals body 2.5 3 0.85 mm 4. Functional diagram 1A 1 1Y 3 1B 2 2A 4 1 2Y & 6 3 2B 2 5 4 & 3A 6 9 5 3Y 8 3B 9 10 & 8 10 4A 12 12 4Y & 11 11 13 4B 13 mna407 mna408 Fig. 1. Logic symbol Fig. 2. IEC logic symbol A Y B mna409 Fig. 3. Logic diagram (one Schmitt trigger) 74AHC AHCT132 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 7 3 July 2020 2 / 16