74AUP1G132GN,132 NXP

74AUP1G132 Low-power 2-input NAND Schmitt trigger Rev. 5 29 June 2012 Product data sheet 1. General description The 74AUP1G132 provides the single 2-input NAND Schmitt trigger function which accept standard input signals. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. This device ensures a very low static and dynamic power consumption across the entire V range from 0.8 V to 3.6 V. CC This device is fully specified for partial Power-down applications using I . OFF The I circuitry disables the output, preventing the damaging backflow current through OFF the device when it is powered down. The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage V and the negative voltage V is defined as the input T+ T hysteresis voltage V . H 2. Features and benefits Wide supply voltage range from 0.8 V to 3.6 V High noise immunity ESD protection: HBM JESD22-A114F Class 3A exceeds 5000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Low static power consumption I = 0.9 A (maximum) CC Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10 % of V CC I circuitry provides partial Power-down mode operation OFF Multiple package options Specified from 40 Cto+85 C and 40 Cto+125 C 3. Applications Wave and pulse shaper Astable multivibrator Monostable multivibrator.74AUP1G132 NXP Semiconductors Low-power 2-input NAND Schmitt trigger 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1G132GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package 5 leads SOT353-1 body width 1.25 mm 74AUP1G132GM 40 C to +125 C XSON6 plastic extremely thin small outline package no leads SOT886 6 terminals body 1 1.45 0.5 mm 74AUP1G132GF 40 C to +125 C XSON6 plastic extremely thin small outline package no leads SOT891 6 terminals body 1 1 0.5 mm 74AUP1G132GN 40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74AUP1G132GS 40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mm 74AUP1G132GX 40 C to +125 C X2SON5 X2SON5: plastic thermal enhanced extremely thin SOT1226 small outline package no leads 5 terminals body 0.8 0.8 0.35 mm 5. Marking Table 2. Marking 1 Type number Marking code 74AUP1G132GW aE 74AUP1G132GM aE 74AUP1G132GF aE 74AUP1G132GN aE 74AUP1G132GS aE 74AUP1G132GX aE 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 6. Functional diagram A 1 1 B & Y 4 4 Y 2 A 2 B mna097 mna098 001aac532 Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram 74AUP1G132 All information provided in this document is subject to legal disclaimers. NXP B.V. 2012. All rights reserved. Product data sheet Rev. 5 29 June 2012 2 of 22