74HC05BQ,115 NXP

74HC05 Hex inverter with open-drain outputs Rev. 3 8 July 2020 Product data sheet 1. General description The 74HC05 contains six inverters. The outputs of the 74HC05 are open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. The open-drain outputs require pull-up resistors to perform correctly. 2. Features and benefits Wide operating voltage 2.0 V to 6.0 V CMOS input levels Latch-up performance exceeds 100 mA per JESD 78 Class II level A Complies with JEDEC standard no. 7A ESD protection: HBM JESD22-A114E exceeds 2000 V CDM JESD22-C101C exceeds 1000 V Multiple package options Specified from -40 C to +85 C and from -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC05D -40 C to +125 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74HC05PW -40 C to +125 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74HC05BQ -40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1 very thin quad flat package no leads 14 terminals body 2.5 3 0.85 mmNexperia 74HC05 Hex inverter with open-drain outputs 4. Functional diagram 1 1A 1Y 2 2A 2Y 3 4 3A 3Y 5 6 4A 4Y 8 9 V CC 5A 5Y 11 10 Y 6A 6Y 12 13 A GND mna525 001aaj979 Fig. 1. Logic symbol Fig. 2. Logic diagram (one gate) 5. Pinning information 5.1. Pinning 74HC05 1 14 1A V CC 74HC05 1Y 2 13 6A 1A 1 14 V 3 12 CC 2A 6Y 1Y 2 13 6A 2Y 4 11 5A 2A 3 12 6Y 2Y 4 11 5A 3A 5 10 5Y 3A 5 10 5Y 3Y 6 9 4A 3Y 6 9 4A GND 7 8 4Y GND 7 8 4Y 001aaj980 001aak276 Fig. 3. Pin configuration SOT108-1 (SO14) Fig. 4. Pin configuration SOT402-1 (TSSOP14) 74HC05 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 8 July 2020 2 / 13