74HC08N,652 NXP

74HC08 74HCT08 Quad 2-input AND gate Rev. 6 13 June 2017 Product data sheet 1 General description The 74HC08 74HCT08 is a quad 2-input AND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V . CC 2 Features and benefits Complies with JEDEC standard JESD7A Input levels: For 74HC08: CMOS level For 74HCT08: TTL level ESD protection: HBM JESD22-A114F exceeds 2 000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from -40 C to +85 C and from -40 C to +125 C 3 Ordering information Table 1. Ordering information Type Package number Temperature range Name Description Version 74HC08D -40 C to +125 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74HCT08D 74HC08DB -40 C to +125 C SSOP14 plastic shrink small outline package 14 leads SOT337-1 body width 5.3 mm 74HCT08DB 74HC08PW -40 C to +125 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74HCT08PW 74HC08BQ -40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1 very thin quad flat package no leads 14 terminals 74HCT08BQ body 2.5 3 0.85 mmNexperia 74HC08 74HCT08 Quad 2-input AND gate 4 Functional diagram 1 & 3 2 4 & 6 1 1A 1Y 3 5 2 1B 4 2A 2Y 6 9 5 2B & 8 10 9 3A 3Y 8 10 3B A 12 12 4A & 4Y 11 11 Y 13 4B 13 B mna222 mna223 mna221 Figure 1. Logic symbol Figure 2. IEC logic symbol Figure 3. IEC logic symbol 5 Pinning information 5.1 Pinning 74HC08 74HCT08 terminal 1 index area 1B 2 13 4B 74HC08 1Y 3 12 4A 74HCT08 2A 4 11 4Y 1 14 1A V CC 2B 5 (1) 10 3B GND 1B 2 13 4B 2Y 6 9 3A 1Y 3 12 4A aaa-004036 2A 4 11 4Y Transparent top view 2B 5 10 3B (1) This is not a supply pin. The substrate is attached to 6 9 2Y 3A this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. GND 7 8 3Y However, if it is soldered, the solder land should remain aaa-004035 floating or be connected to GND. Figure 4. Pin configuration SO14 and (T)SSOP14 Figure 5. Pin configuration DHVQFN14 74HC HCT08 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved. Product data sheet Rev. 6 13 June 2017 2 / 16 GND 7 1 1A 3Y 8 14 V CC