74HC283D,653 NXP

74HC283 4-bit binary full adder with fast carry Rev. 03 11 November 2004 Product data sheet 1. General description The 74HC283 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC283 is specied in compliance with JEDEC standard no. 7A. The 74HC283 adds two 4-bit binary words (An plus Bn) plus the incoming carry (CIN). The binary sum appears on the sum outputs (S1 to S4) and the out-going carry (COUT) according to the equation: CIN + (A1 + B1) + 2(A2 + B2) + 4(A3 + B3) + 8(A4 + B4) = = S1 + 2S2 + 4S3 + 8S4 + 16COUT Where (+) = plus. Due to the symmetry of the binary add function, the 74HC283 can be used with either all active HIGH operands (positive logic) or all active LOW operands (negative logic). In case of all active LOW operands the results S1 to S4 and COUT should be interpreted also as active LOW. With active HIGH inputs, CIN must be held LOW when no carry in is intended. Interchanging inputs of equal weight does not affect the operation, thus CIN, A1, B1 can be assigned arbitrarily to pins 5, 6, 7, etc. See the 74HC583 for the BCD version. 2. Features High-speed 4-bit binary addition Cascadable in 4-bit increments Fast internal look-ahead carry Low-power dissipation Complies with JEDEC standard no. 7A ESD protection: HBM EIA/JESD22-A114-B exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. Multiple package options Specied from - 40 Cto+80 C and from - 40 C to +125 C.74HC283 Philips Semiconductors 4-bit binary full adder with fast carry 3. Quick reference data Table 1: Quick reference data GND = 0 V T =25 C t =t = 6 ns. amb r f Symbol Parameter Conditions Min Typ Max Unit t , t propagation delay C = 15 pF V =5 V PHL PLH L CC CIN to S1 - 16 - ns CIN to S2 - 18 - ns CIN to S3 - 20 - ns CIN to S4 - 23 - ns An or Bn to Sn - 21 - ns CIN to COUT - 20 - ns An or Bn to COUT - 20 - ns C input capacitance - 3.5 - pF I 1 C power dissipation V = GND to V -88 - pF PD I CC capacitance 1 C is used to determine the dynamic power dissipation (P in W). PD D 2 2 P =C V f N+ (C V f ) where: D PD CC i L CC o f = input frequency in MHz i f = output frequency in MHz o C = output load capacitance in pF L V = supply voltage in V CC N = number of inputs switching 2 (C V f ) = sum of outputs. L CC o 4. Ordering information Table 2: Ordering information Type number Package Temperature range Name Description Version 74HC283N - 40 C to +125 C DIP16 plastic dual in-line package 16 leads (300 mil) SOT38-4 74HC283D - 40 C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74HC283DB - 40 C to +125 C SSOP16 plastic shrink small outline package 16 leads SOT338-1 body width 5.3 mm 74HC283PW - 40 C to +125 C TSSOP16 plastic thin shrink small outline package SOT403-1 16 leads body width 4.4 mm 9397 750 13811 Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 03 11 November 2004 2 of 20