74HC30N NXP

74HC30; 74HCT30 8-input NAND gate Rev. 7 2 December 2015 Product data sheet 1. General description The 74HC30; 74HCT30 is an 8-input NAND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V . CC 2. Features and benefits Complies with JEDEC standard JESD7A Input levels: For 74HC30: CMOS level For 74HCT30: TTL level ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC30D 40 C to +125 C SO14 plastic small outline package; 14 leads; SOT108-1 body width 3.9 mm 74HCT30D 74HC30DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body SOT337-1 width 5.3 mm 74HCT30DB 74HC30PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; SOT402-1 body width 4.4 mm 74HCT30PW74HC30; 74HCT30 Nexperia 8-input NAND gate 4. Functional diagram  $   %   &   '  <    (   )  * + PQ QDP Fig 1. Logic symbol Fig 2. IEC logic symbol $ % & ' < ( PQ ) * + Fig 3. Logic diagram 74HC_HCT30 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 7 2 December 2015 2 of 15 D D