74HC4015N NXP

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT4015 Dual 4-bit serial-in/parallel-out shift register December 1990 Product specication File under Integrated Circuits, IC06Philips Semiconductors Product specication Dual 4-bit serial-in/parallel-out shift 74HC/HCT4015 register FEATURES The 74HC/HCT4015 are dual edge-triggered 4-bit static shift registers (serial-to-parallel converters). Each shift Output capability: standard register has a serial data input (1D and 2D), a clock input I category: MSI CC (1CP and 2CP), four fully buffered parallel outputs (1Q to 0 1Q and 2Q to 2Q ) and an overriding asynchronous 3 0 3 master reset (1MR and 2MR). Information present on nD GENERAL DESCRIPTION is shifted to the first register position, and all data in the The 74HC/HCT4015 are high-speed Si-gate CMOS register is shifted one position to the right on the devices and are pin compatible with the 4015 of the LOW-to-HIGH transition of nCP. 4000B series. They are specified in compliance with A HIGH on nMR clears the register and forces nQ to nQ 0 3 JEDEC standard no. 7A. to LOW, independent of nCP and nD. QUICK REFERENCE DATA GND = 0 V T =25C t =t = 6 ns amb r f TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC HCT t / t propagation delay nCP to nQ C = 15 pF V = 5 V 1618ns PHL PLH n L CC f maximum clock frequency 110 74 MHz max C input capacitance 3.5 3.5 pF I C power dissipation capacitance per register notes 1 and 2 35 40 pF PD Notes 1. C is used to determine the dynamic power dissipation (P in W): PD D 2 2 P =C V f + (C V f ) where: D PD CC i L CC o f = input frequency in MHz i f = output frequency in MHz o 2 (C V f ) = sum of outputs L CC o C = output load capacitance in pF L V = supply voltage in V CC 2. For HC the condition is V = GND to V I CC For HCT the condition is V = GND to V - 1.5 V I CC ORDERING INFORMATION See 74HC/HCT/HCU/HCMOS Logic Package Information. December 1990 2