74LVC1G332GN NXP

74LVC1G332 Single 3-input OR gate Rev. 4 6 December 2011 Product data sheet 1. General description The 74LVC1G332 provides one 3-input OR function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall time. This device is fully specified for partial power-down applications using I . OFF The I circuitry disables the output, preventing the damaging backflow current through OFF the device when it is powered down. 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101-C exceeds 1000 V 24 mA output drive (V =3.0 V) CC CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V Multiple package options Specified from 40 C to +85 C and 40 C to +125 C74LVC1G332 NXP Semiconductors Single 3-input OR gate 3. Ordering information Table 1. Ordering information Type number Package Temperature Name Description Version range 74LVC1G332GW 40 Cto+125 C SC-88 plastic surface-mounted package; 6 leads SOT363 74LVC1G332GV 40 C to +125 C SC-74 plastic surface-mounted package (TSOP6); 6 leads SOT457 74LVC1G332GM 40 Cto+125 C XSON6 plastic extremely thin small outline package; no leads; SOT886 6 terminals; body 1 1.45 0.5 mm 74LVC1G332GF 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads; SOT891 6 terminals; body 1 1 0.5 mm 74LVC1G332GN 40 C to +125 C XSON6 extremely thin small outline package; no leads; SOT1115 6 terminals; body 0.9 1.0 0.35 mm 74LVC1G332GS 40 C to +125 C XSON6 extremely thin small outline package; no leads; SOT1202 6 terminals; body 1.0 1.0 0.35 mm 4. Marking Table 2. Marking [1] Type number Marking code 74LVC1G332GW YG 74LVC1G332GV YG 74LVC1G332GM YG 74LVC1G332GF YG 74LVC1G332GN YG 74LVC1G332GS YG [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram B 3 B 1 Y 4 1 A A Y 1 4 3 6 C 6 C 001aad933 001aad934 001aad935 Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram 74LVC1G332 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 4 6 December 2011 2 of 17