74LVC3GU04DC

74LVC3GU04 Triple unbuffered inverter Rev. 11 9 April 2013 Product data sheet 1. General description The 74LVC3GU04 is a triple unbuffered inverter. Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices in a mixed 3.3 V and 5 V environment. 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V 24 mA output drive at V =3.0 V CC CMOS low power consumption Latch-up performance exceeds 250 mA Multiple package options Specified from 40 Cto+85 C and from 40 Cto+125 C. 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC3GU04DP 40 Cto +125 C TSSOP8 plastic thin shrink small outline package 8 leads SOT505-2 body width 3 mm lead length 0.5 mm 74LVC3GU04DC 40 Cto +125 C VSSOP8 plastic very thin shrink small outline package 8 leads SOT765-1 body width 2.3 mm 74LVC3GU04GT 40 Cto +125 C XSON8 plastic extremely thin small outline package no leads SOT833-1 8 terminals body 1 1.95 0.5 mm 74LVC3GU04GF 40 C to +125 C XSON8 extremely thin small outline package no leads SOT1089 8 terminals body 1.35 1 0.5 mm 74LVC3GU04GD 40 Cto +125 C XSON8 plastic extremely thin small outline package no leads SOT996-2 8 terminals body 3 2 0.5 mm74LVC3GU04 NXP Semiconductors Triple unbuffered inverter Table 1. Ordering information continued Type number Package Temperature range Name Description Version 74LVC3GU04GM 40 C to +125 C XQFN8 plastic, extremely thin quad flat package no leads SOT902-2 8 terminals body 1.6 1.6 0.5 mm 74LVC3GU04GN 40 C to +125 C XSON8 extremely thin small outline package no leads SOT1116 8 terminals body 1.2 1.0 0.35 mm 74LVC3GU04GS 40 C to +125 C XSON8 extremely thin small outline package no leads SOT1203 8 terminals body 1.35 1.0 0.35 mm 4. Marking Table 2. Marking codes 1 Type number Marking code 74LVC3GU04DP VU04 74LVC3GU04DC VU4 74LVC3GU04GT VU4 74LVC3GU04GF YD 74LVC3GU04GD VU4 74LVC3GU04GM VU4 74LVC3GU04GN YD 74LVC3GU04GS YD 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1 1A 1Y 1 2A 2Y 1 3A 3Y 001aah793 001aah794 Fig 1. Logic symbol Fig 2. IEC logic symbol 74LVC3GU04 All information provided in this document is subject to legal disclaimers. NXP B.V. 2013. All rights reserved. Product data sheet Rev. 11 9 April 2013 2 of 21