A71CH Plug & Trust Secure Element Rev. 1.2 27 September 2018 Data sheet 449312 COMPANY PUBLIC 1. Introduction The A71CH is a ready-to-use solution providing a root of trust at the IC level and proven, chip-to-cloud security right out of the box. It is a platform capable of securely storing and provisioning credentials, securely connecting IoT devices to cloud services and performing cryptographic node authentication. The A71CH solution provides basic security measures protecting the IC against many physical and logical attacks. It can be used with various host platforms and host operating systems to secure a broad range of applications. It is complemented by a comprehensive product support package, offering easy design-in with plug & play host application code, easy to use development kits, reference designs, and extensive documentation for product evaluation. MCU A71CH OpenSSL/ Mbed TLS ENGINE IoT APPLET I2C i.MX/ KINETIS HOST LIBRARY JAVA CARD OPERATING SYSTEM A71 HARDWARE A71CH delivery aaa-029324 Fig 1. A71CH block diagram A71CH NXP Semiconductors Plug & Trust Secure Element 2. General description 2.1 A71CH naming conventions The following table explains the naming conventions of the commercial product name of the A71CH products. Every A71CH product gets assigned such a commercial name, which includes also customer and application specific data. The A71CH commercial names have the following format. A71CHxagpp(p)/mvsrrff The A71CH is a constant, all other letters are variables, which are explained in Table 1. Table 1. A71CH commercial name format Variable Meaning Values Description x IC hardware specification 1 standard operational ambient temperature: code 25 C to +85 C 2 I C interface supported 2 standard operational ambient temperature: 40 C to +90 C 2 I C interface supported a embedded operating C Java card operating system system code g embedded application H H is a fixed value = IoT security applet pre firmware (applet) code installed pp(p) package type code dd(d)= Delivery Type, TK2= HVSON8 (4x4), UK= WLCSP12 m Manufacturing Site Code T v Silicon Version Code 0 s Silicon Version Subcode B rr ROM Code ID ff FabKey ID 2 2.2 I C interface 2 The A71CH has an I C interface in slave mode, supporting data rates up to 400 kbit/s 2 2 operating in Fast-Mode (FM). The I C interface is using the Smartcard I C protocol as defined in Ref. 3 which is based on SMBus. 2.3 Security licensing NXP Semiconductors has obtained a patent license for SPA and DPA countermeasures from Cryptography Research Incorporated (CRI). This license covers both hardware and software countermeasures. It is important to customers that countermeasures within the operation system are covered under this license agreement with CRI. Further details can be obtained on request. 449312 All information provided in this document is subject to legal disclaimers. NXP B.V. 2018. All rights reserved. Data sheet Rev. 1.2 27 September 2018 COMPANY PUBLIC 449312 2 of 29