NXP Semiconductors KE1xZP100M72SF0 Data Sheet: Technical Data Rev. 4.2, 03/2021 Kinetis KE1xZ with up to 256 KB MKE1xZ256VLL7 MKE1xZ256VLH7 Flash MKE1xZ128VLL7 Up to 72 MHz ARM Cortex-M0+ Based Microcontroller MKE1xZ128VLH7 Kinetis KE1xZ256 MCUs are the leading parts for the KE1xZ familiy based on ARM Cortex -M0+ core. Providing up to 256 KB flash, up to 32 KB RAM, and the complete set of analog/ digital features, KE1xZ extends Kinetis E family to higher performance and broader scalability. Robust TSI provides high- level stability and accuracy to customer s HMI system. 1 Msps ADC and FlexTimer help build a perfect solution for BLDC motor control systems. 100 LQFP (LL) 64 LQFP (LH) 14x14x1.4 mm P 0.5 10x10x1.4 mm P 0.5 Core Processor and System Memory and memory interfaces ARM Cortex -M0+ core, supports up to 72 MHz Up to 256 KB program flash frequency Up to 32 KB SRAM ARM Core based on the ARMv6 Architecture and 32 KB FlexNVM for data flash and with EEPROM Thumb -2 ISA emulation Configurable Nested Vectored Interrupt Controller 2 KB FlexRAM for EEPROM emulation (NVIC) 128 Bytes flash cache Memory-Mapped Divide and Square Root module Boot ROM with built in bootloader (MMDVSQ) Mixed-signal analog 8-channel DMA controller extended up to 63 channels 2 12-bit analog-to-digital converter (ADC) with up with DMAMUX to 16 channel analog inputs per module, up to 1 Reliability, safety and security Msps Flash Access Control (FAC) 2 high-speed analog comparators (CMP) with Cyclic Redundancy Check (CRC) generator module internal 8-bit digital to analog converter (DAC) the 128-bit unique identification (ID) number 8-bit DAC of CMP0 supports an output option to pad Internal watchdog (WDOG) with independent clock with a buffer source Timing and control External watchdog monitor (EWM) module 3 Flex Timers (FTM) for PWM generation, offering ADC self calibration feature up to 8 standard channels On-chip clock loss monitoring 1 16-bit Low-Power Timer (LPTMR) with flexible Human-machine interface (HMI) wake up control Supports up to 32 interrupt request (IRQ) sources 1 Programmable Delay Block (PDB) with flexible Up to 89 GPIO pins with interrupt functionality trigger system Touch sensing input (TSI) module 1 32-bit Low-power Periodic Interrupt Timer (LPIT) with 4 channels Real timer clock (RTC) NXP reserves the right to change the production detail specifications as may be required to permit improvements in the design of its products.Clock interfaces Connectivity and communications interfaces 4 - 40 MHz fast external oscillator (OSC) 3 low-power universal asynchronous receiver/ 32 kHz slow external oscillator (OSC32) transmitter (LPUART) modules with DMA support 48 - 60 MHz high-accuracy (up to 1%) fast internal and low power availability reference clock (FIRC) for normal Run 2 low-power serial peripheral interface (LPSPI) 8 MHz / 2 MHz high-accuracy (up to 3%) slow internal modules with DMA support and low power reference clock (SIRC) for low-speed Run availability 128 kHz low power oscillator (LPO) 2 low-power inter-integrated circuit (LPI2C) Low-power FLL (LPFLL) modules with DMA support and low power Up to 60 MHz DC external square wave input clock availability System clock generator (SCG) FlexIO module for flexible and high performance Real time counter (RTC) serial interfaces Power management Debug functionality Low-power ARM Cortex-M0+ core with excellent Serial Wire Debug (SWD) debug interface energy efficiency Debug Watchpoint and Trace (DWT) Power management controller (PMC) with multiple Micro Trace Buffer (MTB) power modes: Run, Wait, Stop, VLPR, VLPW and Operating Characteristics VLPS Voltage range: 2.7 to 5.5 V Supports clock gating for unused modules, and specific Ambient temperature range: 40 to 105 C peripherals remain working in low power modes POR, LVD/LVR Related Resources Type Description Resource Selector The Solution Advisor is a web-based tool that features interactive Solution Advisor Guide application wizards and a dynamic product selector. 1 Product Brief The Product Brief contains concise overview/summary information to KE1xZ256PB enable quick evaluation of a device for design suitability. 1 Reference The Reference Manual contains a comprehensive description of the KE1xZP100M72SF0RM Manual structure and function (operation) of a device. Data Sheet The Data Sheet includes electrical characteristics and signal This document: connections. KE1xZP100M72SF0 1 Chip Errata The chip mask set Errata provides additional or corrective information for Kinetis E 1N36S a particular device mask set. 1 Kinetis E 2N36S Package Package dimensions are provided in package drawings. 100-LQFP: 98ASS23308W drawing 64-LQFP: 98ASS23234W 1. To find the associated resource, go to