Document Number S32V234
NXP Semiconductors
Rev. 9, 03/2020
Data Sheet: Technical Data
S32V234
S32V234 Data Sheet
Features Safety concept
ISO 26262, ASIL level target
ARM Cortex-A53, 64-bit CPU
Measures to detect faults in memory and logic
Up to 1000 MHz Quad ARM Cortex-A53
Measures to detect single point and latent faults
32 KB/32 KB I-/D- L1 Cache
Quantitative out of context analysis of functional
NEON MPE co-processor
safety (FMEDA) tailored to application specifics
Dual precision FPU
Safety manual and FMEDA report available
2 clusters with 2 CPUs and 256 KB L2 cache each
Memory Management Unit Security
GIC Interrupt Controller CSE with 16 KB of on-chip Secure RAM and ROM.
ECC/parity error support for its memories ARM TrustZone (TZ) architecture support
Generic timers Boot from NOR flash with AES-128 (CTR)
Fault encapsulation by hardware for redundant On-Chip One-Time Programmable element
executed application software on multiple core Controller (OCOTP_CTRL) with on chip electrical
cluster fuse array.
System JTAG Controller (SJC)
ARM Cortex-M4, 32-bit CPU
Up to 133 MHz Debug functionality
16 KB/16 KB I-/D- L1 Cache Standard JTAG and Compact JTAG
32+32 KB tightly coupled memory (TCM) 16-bit Trace port, Serial Wire Output port
ECC/parity support for its memories
Timers
Clocks General purpose timers (FTM)
Phase Locked Loops (PLLs) Two Periodic Interrupt Timer (PIT)
1 external crystal oscillator (FXOSC) IEEE 1588 Timers (part of Ethernet Subsystem)
1 FIRC oscillator
Analog
System protection and power management features 1x 12-bit 1.8 V SAR ADC with self-test
Flexible run modes to consume low power based on
Communications
application needs
UART(w/ LIN2.1l)
Peripheral clock enable register can disable clocks to
Serial peripheral interface (SPI)
unused modules, thereby reducing currents
I2C blocks
Power gating of unused A53 cores and GPU
PCI express 2.0 with endpoint and root complex
Low and high voltage warning and detect
support
Hardware CRC module to support fast cyclic
LFAST serial link
redundancy checks (CRC)
1 GBit Ethernet with PTP IEEE 1588
120-bit unique chip identifier
FD-CAN
Hardware watchdog
FlexRay Dual Channel, Version 2.1 RevA
eDMA controller with 32 channels (with
DMAMUX)
Extended Resource Domain Controller
NXP reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products. Memory interfaces
32-bit DRAM Controller with support for LPDDR2/DDR3/DDR3L - Data rate of up to 1066 MT/s at 533 MHz clock
frequency with ECC (SEC-DED-TED) triple error detection support for subregion
QuadSPI supporting Execute-In-Place (XIP)
Boot flash fault detection and correction using two-dimensional parity.
Triple fault detection and single fault correction scheme for external DDR-RAM including address/page fault detection.
Video input interfaces, Image processing, graphics processing, display
Display Control Unit (2D-ACE) with 24-bit RGB, GPU frame buffer decoding
GPU GC3000 with frame buffer compression
2x VIU (Video interface unit) for camera input
2x MIPICSI2 with four lanes for camera input (support 1080 pixel @ 30 fps)
Image signal processor (ISP), supporting 2x1 or 1x2 megapixel @ 30 fps and 4x2 megapixel for subset of functions
(exposure control, gamma correction)
2x APEX2-CL Image cognition processor. APEX-642CL comprises two Array Processing Unit (APU) cores
configurable as single SIMD engine with 64 16-bit Computational Units (CU), or configurable as two core MIMD
engines with 32 16-bit CUs each.
CUs are comprised of four Functional Units: 16-bit Multiplier, Load Store Unit, ALU, and Shifter
JPEG video decoder (8/12-bit)
H.264 video decoder (8/10/12-bit), High-intra and constrained baseline formats
H.264 video encode (8/10/12-bit), High-intra only
Fast DMA for data transfers between DRAM and System RAM with CRC
Human-Machine Interface (HMI)
GPIO pins with interrupt support, DMA request capability, digital glitch filter
Configurable slew rate and drive strength on all output pins
System RAM
4 MB On-Chip System RAM with ECC
S32V234 Data Sheet, Rev. 9, 03/2020
2 NXP Semiconductors