MC33882PEKR2 NXP

Document Number: MC33882 Freescale Semiconductor Rev. 11.0, 11/2014 Technical Data Six Output Low-side Switch with 33882 SPI and Parallel Input Control The 33882 is a smart 6 output low-side switch able to control system loads up to 1.0 A. The six outputs can be controlled via both serial SIX OUTPUT LOW-SIDE SWITCH peripheral interface (SPI) and parallel input control, making the device attractive for fault tolerant system applications. There are two additional 30 mA low-side switches with SPI diagnostic reporting (parallel input control only). The 33882 is designed to interface directly with industry standard microcontrollers via SPI to control both inductive and incandescent loads. Outputs are configured as open drain power MOSFETs incorporating internal dynamic clamping and current limiting. The EK SUFFIX EP SUFFIX VW SUFFIX device has multiple monitoring and protection features, including low (PB-FREE) (PB-FREE) (PB-FREE) 98ASA00706D 98ARL10543D standby current, fault status reporting, internal 52 V clamp on each 98ASH70693A 32-PIN QFN 32-PIN SOICW 30-PIN HSOP output, output specific diagnostics, and protective shutdown. Additionally, it has a mode select pin affording a dual means of input control. ORDERING INFORMATION Features Device Outputs clamped for switching inductive loads (For Tape and Temperature Package Very low operational bias currents (< 2.0 mA) Reel, add an R2 Range (T ) A CMOS input logic compatible with 5.0 V logic levels Suffix) Robust load dump (60 V transient at V on OUT0 OUT5) PWR MC33882PVW 30 HSOP Daisy chain operation of multiple devices possible MC33882PEP -40 C to 125 C 32 QFN Switch outputs can be paralleled for higher currents R of 0.4 per output (25 C) at 13 V V MC33882PEK 32 SOICW-EP DS(ON) PWR SPI operation guaranteed to 2.0 MHz V DD V PWR 33882 VPWR OUT0 VDD OUT1 CS OUT2 High Power Outputs SCLK OUT3 MCU SI OUT4 SO OUT5 Low Power IN0 OUT6 LED IN1 OUT7 Outputs IN2 IN0 & IN1 Optional Parallel IN3 IN2 & IN3 Control of Optional Control IN4 Outputs 0 through 7 of Paired Outputs IN4 & IN5 IN5 MODE IN6 IN7 GND Figure 1. 33882 Simplified Application Diagram Freescale Semiconductor, Inc., 2006 - 2014. All rights reserved.- + + - - + INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM 1 (VPWR) 16 (VDD) 12 (SI) DDDQ QQQQDD DQ DQ DQ Over-voltage Under-voltage Internal V DD CCC CC C C C Shutdown Shutdown Bias On Open 3 (MODE) Detect OUT6 Logic Gate 7 and OUT7 18 (IN7) 17 (OUT7) Unclamped Low Gate 6 29 (IN6) 30 (OUT6) Power Gate 5 27 (IN5) 26 (OUT5) Gate 4 23 (OUT4) OUT1 24 (IN4) Gate 3 to OUT5 20 (OUT3) High 28 (IN4 & IN5) Gate 2 Power 10 (OUT2) Gate 0 21 (IN3) 7 (OUT1) 5 (OUT0) 9 (IN2) 52 V 19 (IN2 & IN3) Gate 0 6 (IN1) V REF 4 (IN0) Output 0 Status I LIM Output Status 2 (IN0 & IN1) 1 through 7 GND (Heat Sink) 01 2 3 45 6 7 Serial In SO Fault Latch/Shift Register Serial Out OFF/ON Open 13 (SCLK) V DD Load Detect 14 (CS) V OF (th) Shift 3.0 A 3.0 V Tri-state Enable Load I 15 (SO) O(OFF) Short 40 A Detect Note Pin numbers shown in this figure are applicable only to the 30-lead HSOP package. Figure 2. 33882 Simplified Internal Block Diagram MC33882 Data Sheet, Rev. 11.0, 11/2014 Analog Integrated Circuit Device Data 2 Freescale Semiconductor