MC56F8355VFGE NXP

56F8355/56F8155 Data Sheet Preliminary Technical Data 56F8300 16-Bit Digital Signal Controllers MC56F8355 Rev. 17 08/2009 freescale.com Document Revision History Version History Description of Change Rev 0.0 Initial release Rev 1.0 Fixed typos in Section 1.1.3 Replace any reference to Flash Interface Unit with Flash Memory Module added note to Vcap pin in Table 2-2 corrected Table 4-4, removed unneccessary notes in Table 10-12 corrected temperature range in Table 10-14 added ADC calibration information to Table 10-23 and new graphs in Figure 10-22 Rev 2.0 Corrected 2.2F to 0.1 F low ESR capacitor in Table 2-2. Replaced Table 10-16 with correct parameters for the 128 package pinout. Corrected (fout/2) with (fout) in Table 10-14. Corrected pinout labels in Figure 11-1. Rev 3.0 Adding/clarifing notes to Table 4-4 to help clarify independent program flash blocks and other Program Flash modes, clarification to Table 10-22, corrected Digital Input Current Low (pullup enabled) numbers in Table 10-5. Removed text and Table 10-2 replaced with note to Table 10-1. Rev 4.0 Correcting Table 4-6 Address locations. Rev 5.0 Added 56F8155 information edited to indicate differences in 56F8355 and 56F8155. Refor- matted for Freescale look and feel. Updated Temperature Sensor and ADC tables, then updated balance of electrical tables for consistency throughout the family. Clarified I/O power description in Table 2-2, added note to Table 10-7 and clarified Section 12.3. Rev 6.0 Added output voltage maximum value and note to clarify in Table 10-1 also removed overall life expectancy note, since life expectancy is dependent on customer usage and must be determined by reliability engineering. Clarified value and unit measure for Maximum allowed P in Table 10-3. Corrected note about average value for Flash Data Retention in D Table 10-4. Added new RoHS-compliant orderable part numbers in Table 13-1. Rev 7.0 Updated Table 10-23 to reflect new value for maximum Uncalibrated Gain Error Rev 8.0 Deleted RSTO from Pin Group 2 (listed after Table 10-1). Deleted formula for Max Ambient Operating Temperature (Automotive) and Max Ambient Operating Temperature (Industrial) in Table 10-4. Added RoHS-compliance and pb-free language to back cover. Rev 9.0 Added information/corrected state during reset in Table 2-2. Clarified external reference crystal frequency for PLL in Table 10-14 by increasing maximum value to 8.4MHz. Rev 10.0 Replaced Tri-stated with an explanation in State During Reset column in Table 2-2. Rev 11.0 Corrected bootflash memory map layout in Table 4-4 to 16KB. Added the following note to the description of the TMS signal in Table 2-2: Rev. 12 Note: Always tie the TMS pin to V through a 2.2K resistor. DD Added the following note to the description of the TRST signal in Table 2-2: Note: For normal operation, connect TRST directly to V . If the design is to be used in a SS debugging environment, TRST may be tied to V through a 1K resistor. SS Please see