Document Number: IMX6DQCEC NXP Semiconductors Rev. 6, 11/2018 Data Sheet: Technical Data MCIMX6QxExxxxC MCIMX6QxExxxxD MCIMX6QxExxxxE MCIMX6DxExxxxC MCIMX6DxExxxxD MCIMX6DxExxxxE i.MX 6Dual/6Quad Applications Processors for Consumer Products Package Information FCPBGA Package 21 x 21 mm, 0.8 mm pitch Ordering Information See Table 1 1 Introduction 1 1 Introduction 1.1 Ordering Information 3 1.2 Features . 5 The i.MX 6Dual/6Quad processors represent the latest 1.3 Signal Naming Convention . 8 2 Architectural Overview 10 achievement in integrated multimedia applications 2.1 Block Diagram 10 processors. These processors are part of a growing 3 Modules List 11 3.1 Special Signal Considerations 19 family of multimedia-focused products that offer high 3.2 Recommended Connections for Unused Analog performance processing and are optimized for lowest Interfaces 19 power consumption. 4 Electrical Characteristics . 20 4.1 Chip-Level Conditions 20 The i.MX 6Dual/6Quad processors feature advanced 4.2 Power Supplies Requirements and Restrictions 33 4.3 Integrated LDO Voltage Regulator Parameters 34 implementation of the quad Arm Cortex -A9 core, 4.4 PLL Electrical Characteristics 36 which operates at speeds up to 1.2 GHz. They include 2D 4.5 On-Chip Oscillators 37 4.6 I/O DC Parameters 38 and 3D graphics processors, 1080p video processing, 4.7 I/O AC Parameters 44 and integrated power management. Each processor 4.8 Output Buffer Impedance Parameters 49 provides a 64-bit DDR3/DDR3L/LPDDR2 memory 4.9 System Modules Timing 53 4.10 Multi-Mode DDR Controller (MMDC) . 64 interface and a number of other interfaces for connecting 4.11 General-Purpose Media Interface (GPMI) Timing. 64 peripherals, such as WLAN, Bluetooth , GPS, hard 4.12 External Peripheral Interface Parameters . 73 5 Boot Mode Configuration . 138 drive, displays, and camera sensors. 5.1 Boot Mode Configuration Pins . 138 5.2 Boot Devices Interfaces Allocation . 139 The i.MX 6Dual/6Quad processors are specifically 6 Package Information and Contact Assignments 141 useful for applications such as the following: 6.1 Signal Naming Convention . 141 6.2 21 x 21 mm Package Information 142 Netbooks (web tablets) 7 Revision History 165 Nettops (Internet desktop devices) NXP Reserves the right to change the production detail specifications as may be required to permit improvements in the design of its products.Introduction High-end mobile Internet devices (MID) High-end PDAs High-end portable media players (PMP) with HD video capability Gaming consoles Portable navigation devices (PND) The i.MX 6Dual/6Quad processors offers numerous advanced features, such as: Applications processorsThe processors enhance the capabilities of high-tier portable applications by fulfilling the ever increasing MIPS needs of operating systems and games. The Dynamic Voltage and Frequency Scaling (DVFS) provides significant power reduction, allowing the device to run at lower voltage and frequency with sufficient MIPS for tasks such as audio decode. Multilevel memory systemThe multilevel memory system of each processor is based on the L1 instruction and data caches, L2 cache, and internal and external memory. The processors support many types of external memory devices, including DDR3, DDR3L, LPDDR2, NOR Flash, PSRAM, cellular RAM, NAND Flash (MLC and SLC), OneNAND, and managed NAND, including eMMC up to rev 4.4/4.41. Smart speed technologyThe processors have power management throughout the device that enables the rich suite of multimedia features and peripherals to consume minimum power in both active and various low power modes. Smart speed technology enables the designer to deliver a feature-rich product, requiring levels of power far lower than industry expectations. Dynamic voltage and frequency scalingThe processors improve the power efficiency of devices by scaling the voltage and frequency to optimize performance. Multimedia powerhouseThe multimedia performance of each processor is enhanced by a multilevel cache system, Neon MPE (Media Processor Engine) co-processor, a multi-standard hardware video codec, 2 autonomous and independent image processing units (IPU), and a programmable smart DMA (SDMA) controller. Powerful graphics accelerationEach processor provides three independent, integrated graphics processing units: an OpenGL ES 2.0 3D graphics accelerator with four shaders (up to 200 MTri/s and OpenCL support), 2D graphics accelerator, and dedicated OpenVG 1.1 accelerator. Interface flexibilityEach processor supports connections to a variety of interfaces: LCD controller for up to four displays (including parallel display, HDMI1.4, MIPI display, and LVDS display), dual CMOS sensor interface (parallel or through MIPI), high-speed USB on-the-go with PHY, high-speed USB host with PHY, multiple expansion card ports (high-speed MMC/SDIO host and other), 10/100/1000 Mbps Gigabit Ethernet controller, and a variety of other popular interfaces 2 2 (such as UART, I C, and I S serial audio, SATA-II, and PCIe-II). Advanced securityThe processors deliver hardware-enabled security features that enable secure e-commerce, digital rights management (DRM), information encryption, secure boot, and secure software downloads. The security features are discussed in detail in the i.MX 6Dual/6Quad security reference manual (IMX6DQ6SDLSRM). Integrated power managementThe processors integrate linear regulators and internally generate voltage levels for different domains. This significantly simplifies system power management structure. i.MX 6Dual/6Quad Applications Processors for Consumer Products, Rev. 6, 11/2018 2 NXP Semiconductors