Document Number: IMX6DQPAEC NXP Semiconductors Rev. 3, 11/2018 Data Sheet: Technical Data MCIMX6QPxAxxxxA MCIMX6QPxAxxxxB MCIMX6DPxAxxxxA MCIMX6DPxAxxxxB i.MX 6DualPlus/6QuadPlus Automotive Applications Processors Package Information FCPBGA Package 21 x 21 mm, 0.8 mm pitch Ordering Information See Table 1 1 Introduction 1 1 Introduction 1.1 Ordering Information 2 1.2 Features . 4 The i.MX 6DualPlus/6QuadPlus processors offer the 1.3 Signal Naming Convention . 7 2 Architectural Overview . 9 highest levels of graphics processing performance in the 2.1 Block Diagram . 9 i.MX 6 series family and are ideally suited for graphics 3 Modules List 10 3.1 Special Signal Considerations 19 intensive applications such as reconfigurable instrument 3.2 Recommended Connections for Unused Analog clusters and high performance infotainment systems. Interfaces 19 4 Electrical Characteristics . 20 The i.MX 6DualPlus/6QuadPlus processors feature 4.1 Chip-Level Conditions 20 advanced implementation of the quad 4.2 Power Supplies Requirements and Restrictions 33 4.3 Integrated LDO Voltage Regulator Parameters 34 Arm Cortex -A9 core, which operates at speeds up to 4.4 PLL Electrical Characteristics 36 1 GHz. They include updated versions of the 2D and 3D 4.5 On-Chip Oscillators 37 4.6 I/O DC Parameters 38 graphics processors, 1080p video processing, and 4.7 I/O AC Parameters 44 integrated power management. Each processor provides 4.8 Output Buffer Impedance Parameters 49 a 64-bit DDR3/DDR3L/LPDDR2 memory interface and 4.9 System Modules Timing 53 4.10 Multi-Mode DDR Controller (MMDC) . 64 a number of other interfaces for connecting peripherals, 4.11 General-Purpose Media Interface (GPMI) Timing. 64 such as WLAN, Bluetooth , GPS, hard drive, displays, 4.12 External Peripheral Interface Parameters . 73 5 Boot Mode Configuration . 138 and camera sensors. 5.1 Boot Mode Configuration Pins . 138 5.2 Boot Devices Interfaces Allocation . 139 The i.MX 6DualPlus/6QuadPlus processors are 6 Package Information and Contact Assignments 141 specifically useful for applications such as the 6.1 Signal Naming Convention . 141 following: 6.2 21 x 21 mm Package Information 141 7 Revision History 164 Reconfigurable instrument cluster high performance infotainment NXP Reserves the right to change the production detail specifications as may be required to permit improvements in the design of its products.Introduction Graphics rendering for Human Machine Interfaces (HMI) Video processing and display The i.MX 6DualPlus/6QuadPlus processors offers numerous advanced features, such as: Multilevel memory systemThe multilevel memory system of each processor is based on the L1 instruction and data caches, L2 cache, and internal and external memory. The processors support many types of external memory devices, including DDR3, DDR3L, LPDDR2, NOR Flash, PSRAM, cellular RAM, NAND Flash (MLC and SLC), OneNAND, and managed NAND, including eMMC up to rev 4.4/4.41. Smart speed technologyThe processors have power management throughout the device that enables the rich suite of multimedia features and peripherals to consume minimum power in both active and various low power modes. Smart speed technology enables the designer to deliver a feature-rich product, requiring levels of power far lower than industry expectations. Dynamic voltage and frequency scalingThe processors improve the power efficiency of devices by scaling the voltage and frequency to optimize performance. Multimedia powerhouseThe multimedia performance of each processor is enhanced by a multilevel cache system, Neon MPE (Media Processor Engine) co-processor, a multi-standard hardware video codec, 2 autonomous and independent image processing units (IPU), and a programmable smart DMA (SDMA) controller. Powerful graphics accelerationEach processor provides three independent, integrated graphics processing units: an OpenGL ES 3.0 3D graphics accelerator with four shaders (up to 198 MTri/s and OpenCL support), 2D graphics accelerator, and dedicated OpenVG 1.1 accelerator. Interface flexibilityEach processor supports connections to a variety of interfaces: LCD controller for up to four displays (including parallel display, HDMI1.4, MIPI display, and LVDS display), dual CMOS sensor interface (parallel or through MIPI), high-speed USB on-the-go with PHY, high-speed USB host with PHY, multiple expansion card ports (high-speed MMC/SDIO host and other), 10/100/1000 Mbps Gigabit Ethernet controller, and a variety of other popular interfaces 2 2 (such as UART, I C, and I S serial audio, SATA-II, and PCIe-II). Automotive environment supportEach processor includes interfaces, such as two CAN ports, an MLB150/50 port, an ESAI audio interface, and an asynchronous sample rate converter for multichannel/multisource audio. Advanced securityThe processors deliver hardware-enabled security features that enable secure e-commerce, digital rights management (DRM), information encryption, secure boot, and secure software downloads. The security features are discussed in detail in the i.MX 6Dual/6Quad security reference manual (IMX6DQ6SDLSRM). Integrated power managementThe processors integrate linear regulators and internally generate voltage levels for different domains. This significantly simplifies system power management structure. 1.1 Ordering Information Table 1 shows examples of orderable part numbers covered by this data sheet. This table does not include all possible orderable part numbers. The latest part numbers are available on nxp.com/imx6series. If your i.MX 6DualPlus/6QuadPlus Automotive Applications Processors, Rev. 3, 11/2018 2 NXP Semiconductors