MFRC522 Standard performance MIFARE and NTAG frontend Rev. 3.9 27 April 2016 Product data sheet 112139 COMPANY PUBLIC 1. Introduction This document describes the functionality and electrical specifications of the contactless reader/writer MFRC522. Remark: The MFRC522 supports all variants of the MIFARE Mini, MIFARE 1K, MIFARE 4K, MIFARE Ultralight, MIFARE DESFire EV1 and MIFARE Plus RF identification protocols. To aid readability throughout this data sheet, the MIFARE Mini, MIFARE 1K, MIFARE 4K, MIFARE Ultralight, MIFARE DESFire EV1 and MIFARE Plus products and protocols have the generic name MIFARE. 1.1 Differences between version 1.0 and 2.0 The MFRC522 is available in two versions: MFRC52201HN1, hereafter referred to version 1.0 and MFRC52202HN1, hereafter referred to version 2.0. The MFRC522 version 2.0 is fully compatible to version 1.0 and offers in addition the following features and improvements: Increased stability of the reader IC in rough conditions An additional timer prescaler, see Section 8.5. A corrected CRC handling when RX Multiple is set to 1 This data sheet version covers both versions of the MFRC522 and describes the differences between the versions if applicable. 2. General description The MFRC522 is a highly integrated reader/writer IC for contactless communication at 13.56 MHz. The MFRC522 reader supports ISO/IEC 14443 A/MIFARE and NTAG. The MFRC522s internal transmitter is able to drive a reader/writer antenna designed to communicate with ISO/IEC 14443 A/MIFARE cards and transponders without additional active circuitry. The receiver module provides a robust and efficient implementation for demodulating and decoding signals from ISO/IEC 14443 A/MIFARE compatible cards and transponders. The digital module manages the complete ISO/IEC 14443 A framing and error detection (parity and CRC) functionality. The MFRC522 supports MF1xxS20, MF1xxS70 and MF1xxS50 products. The MFRC522 supports contactless communication and uses MIFARE higher transfer speeds up to 848 kBd in both directions.MFRC522 NXP Semiconductors Standard performance MIFARE and NTAG frontend The following host interfaces are provided: Serial Peripheral Interface (SPI) Serial UART (similar to RS232 with voltage levels dependant on pin voltage supply) 2 I C-bus interface 3. Features and benefits Highly integrated analog circuitry to demodulate and decode responses Buffered output drivers for connecting an antenna with the minimum number of external components Supports ISO/IEC 14443 A/MIFARE and NTAG Typical operating distance in Read/Write mode up to 50 mm depending on the antenna size and tuning Supports MF1xxS20, MF1xxS70 and MF1xxS50 encryption in Read/Write mode Supports ISO/IEC 14443 A higher transfer speed communication up to 848 kBd Supports MFIN/MFOUT Additional internal power supply to the smart card IC connected via MFIN/MFOUT Supported host interfaces SPI up to 10 Mbit/s 2 I C-bus interface up to 400 kBd in Fast mode, up to 3400 kBd in High-speed mode RS232 Serial UART up to 1228.8 kBd, with voltage levels dependant on pin voltage supply FIFO buffer handles 64 byte send and receive Flexible interrupt modes Hard reset with low power function Power-down by software mode Programmable timer Internal oscillator for connection to 27.12 MHz quartz crystal 2.5 V to 3.3 V power supply CRC coprocessor Programmable I/O pins Internal self-test 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit 1 2 V analog supply voltage V V = V = V 2.5 3.3 3.6 V DDA DD(PVDD) DDA DDD DD(TVDD) V =V =V =V =0V SSA SSD SS(PVSS) SS(TVSS) V digital supply voltage 2.5 3.3 3.6 V DDD V TVDD supply voltage 2.5 3.3 3.6 V DD(TVDD) 3 V PVDD supply voltage 1.6 1.8 3.6 V DD(PVDD) V SVDD supply voltage V =V =V =V = 0 V 1.6 - 3.6 V DD(SVDD) SSA SSD SS(PVSS) SS(TVSS) MFRC522 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 3.9 27 April 2016 COMPANY PUBLIC 112139 2 of 95