MPC8241LVR266D NXP

Document Number: MPC8241EC Freescale Semiconductor Rev. 10, 02/2009 Technical Data MPC8241 Integrated Processor Hardware Specifications Contents The MPC8241 combines a PowerPC MPC603E core with 1. Overview . 1 a PCI bridge so that system designers can rapidly design 2. Features 3 systems using peripherals designed for PCI and other 3. General Parameters . 5 standard interfaces. Also, a high-performance memory 4. Electrical and Thermal Characteristics 6 5. Package Description . 31 controller supports various types of ROM and SDRAM. The 6. PLL Configuration 39 MPC8241 is the second of a family of products that provide 7. System Design Information . 42 system-level support for industry-standard interfaces with an 8. Ordering Information 52 9. Document Revision History . 54 MPC603e processor core. This hardware specification describes pertinent electrical and physical characteristics of the MPC8241, which is based on the MPC8245 design. For functional characteristics of the processor, refer to the MPC8245 Integrated Processor Reference Manual (MPC8245UM). For published errata or updates to this document, visit the web site listed on the back cover of the document. 1Overview The MPC8241 integrated processor is composed of a peripheral logic block and a 32-bit superscalar MPC603e core, as shown in Figure 1. Freescale Semiconductor, Inc., 2009. All rights reserved.Overview MPC8241 Processor Core Block (64-Bit) Two-Instruction Fetch Additional Features: Prog I/O with Watchpoint Processor Branch PLL JTAG/COP Interface Processing Instruction Unit Unit Power Management (BPU) (64-Bit) Two-Instruction Dispatch System Floating- Integer Load/Store Register Point Unit Unit Unit Unit (IU) (LSU) (SRU) (FPU) 64-Bit Instruction Data MMU MMU 16-Kbyte 1616--KKbytbytee Data IInnststruructctiion on Cache CacCachhee Peripheral Logic Bus Peripheral Logic Block Data Bus Data (64-Bit) Address Data Path (32- or 64-Bit) (32-Bit) Message ECC Controller with 8-Bit Parity or ECC Unit (with I O) 2 Central Memory Memory/ROM/ Control Controller Port X Control/Address Unit DMA Controller Performance Monitor SDRAM SYNC IN 2 2 I C I C Controller SDRAM Clocks DLL Peripheral Logic PCI SYNC IN PLL PIC 5 IRQs/ Interrupt Configuration 16 Serial Controller/ Interrupts Registers Timers PCI Bus DUART Interface Unit Address PCI Watchpoint Fanout PCI Bus Translator Arbiter Facility Buffers Clocks OSC IN 32-Bit Five PCI Interface Request/Grant Pairs Figure 1. MPC8241 Block Diagram MPC8241 Integrated Processor Hardware Specifications, Rev. 10 2 Freescale Semiconductor