Document Number: MPC8349EAEC
Freescale Semiconductor
Rev. 13, 09/2011
Technical Data
MPC8349EA PowerQUICC II Pro
Integrated Host Processor Hardware
Specifications
Contents
The MPC8349EA PowerQUICC II Pro is a next generation
1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
PowerQUICC II integrated host processor. The
2. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . 6
MPC8349EA contains a processor core built on Power
3. Power Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 10
Architecture technology with system logic for networking, 4. Clock Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5. RESET Initialization . . . . . . . . . . . . . . . . . . . . . . . . . 13
storage, and general-purpose embedded applications. For
6. DDR and DDR2 SDRAM . . . . . . . . . . . . . . . . . . . . . 15
functional characteristics of the processor, refer to the
7. DUART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
MPC8349EA PowerQUICC II Pro Integrated Host
8. Ethernet: Three-Speed Ethernet, MII Management . 22
9. USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Processor Family Reference Manual.
10. Local Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
To locate published errata or updates for this document, refer 11. JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
2
12. I C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
to the MPC8349EA product summary page on our website,
13. PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
as listed on the back cover of this document, or contact your
14. Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
local Freescale sales office.
15. GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
16. IPIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
17. SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
18. Package and Pin Listings . . . . . . . . . . . . . . . . . . . . . 53
19. Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
20. Thermal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
21. System Design Information . . . . . . . . . . . . . . . . . . . 79
22. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 82
23. Document Revision History . . . . . . . . . . . . . . . . . . . 84
20062011 Freescale Semiconductor, Inc. All rights reserved.Overview
NOTE
The information in this document is accurate for revision 3.x silicon and
later (in other words, for orderable part numbers ending in A or B). For
information on revision 1.1 silicon and earlier versions, see the MPC8349E
PowerQUICC II Pro Integrated Host Processor Hardware Specifications.
See Section 22.1, Part Numbers Fully Addressed by This Document, for
silicon revision level determination.
1 Overview
This section provides a high-level overview of the device features. Figure 1 shows the major functional
units within the MPC8349EA.
DDR/DDR2
DDR/DD
Memory Controller
Arbiter Bus
R2
Monitor
e300 Core
ROM
Local Bus Controller
SDRAM
32-Kbyte L1 32-Kbyte
Programmable Interrupt
IRQs
Instruction L1 Data
Coherent System Bus
Controller
Cache Cache
Security Engine
64/32b PCI Controller
PCI1
Serial Peripheral
SPI
Interface
Sequencer
0/32b PCI Controller
PCI2
SEQ
DUART
Serial
DMA Controller
DMA
2
2
I C Interfaces
I C
TSEC
MII, GMII, TBI,
RTBI, RGMII
USB0 10/100/1Gb
USB Hi-Speed
Host Device
USB1
TSEC
MII, GMII, TBI,
RTBI, RGMII
10/100/1Gb
General Purpose I/O
GPIO
Figure 1. MPC8349EA Block Diagram
Major features of the device are as follows:
Embedded PowerPC e300 processor core; operates at up to 667 MHz
High-performance, superscalar processor core
Floating-point, integer, load/store, system register, and branch processing units
32-Kbyte instruction cache, 32-Kbyte data cache
Lockable portion of L1 cache
Dynamic power management
Software-compatible with the other Freescale processor families that implement Power
Architecture technology
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 13
2 Freescale Semiconductor