N74F27N,602 NXP

INTEGRATED CIRCUITS 74F27 Triple 3-input NOR gate Product specification 1991 Feb 05 IC15 Data Handbook Philips Semiconductors Product specification Triple 3-input NOR gate 74F27 FEATURE PIN CONFIGURATION Industrial temperature range available (40C to +85C) D0a 1 14 V CC D0b 2 13 D0c TYPE TYPICAL TYPICAL D1a 3 12 Q0 PROPAGATION SUPPLY CURRENT DELAY (TOTAL) D1b 4 11 D2c 74F27 3.0ns 6.5mA D1c 5 10 D2b Q1 6 9 D2a GND 7 8 Q2 SF00033 ORDERING INFORMATION ORDER CODE DESCRIPTION PKG DWG COMMERCIAL RANGE INDUSTRIAL RANGE V = 5V 10%, T = 0C to +70C V = 5V 10%, T = 40C to +85C CC amb CC amb 14-pin plastic DIP N74F27N I74F27N SOT27-1 14-pin plastic SO N74F27D I74F27D SOT108-1 INPUT AND OUTPUT LOADING AND FAN OUT TABLE 74F (U.L.) LOAD VALUE PINS DESCRIPTION HIGH/LOW HIGH/LOW Dna, Dnb, Dnc Data inputs 1.0/1.0 20A/0.6mA Qn Data output 50/33 1.0mA/20mA NOTE: One (1.0) FAST unit load is defined as: 20A in the high state and 0.6mA in the low state. LOGIC DIAGRAM FUNCTION TABLE 1 INPUTS OUTPUT D0a 2 12 Dna Dnb Dnc Qn D0b Q0 13 L L L H D0c X X H L 3 D1a 4 X H X L 6 D1b Q1 5 H X X L D1c NOTES: 9 H = High voltage level D2a L = Low voltage level 10 8 D2b Q2 11 D2c V = Pin 14 CC GND = Pin 7 SF00034 February 5, 1991 2 853 0049 01638