QorIQ P Series Processors QorIQ P1016 and P1025 Communications Processors The QorIQ P1 family, which includes the P1016 and P1025 communications processors, offers the value of smart integration and efficient power for a wide variety of applications in the networking, telecom, defense and industrial markets. Based on 45 nm technology for low-power implementation, the P1016 and P1025 processors provide single- and dualcore options from 400667 MHz performance range, together with advanced security and a rich set of interfaces. The P1016 and P1025 processors are perfectly suited for multiservice gateways, Ethernet switch controllers, wireless LAN access points and high-performance general-purpose control processor applications with tight thermal constraints. The P1016 and P1025 processors are pin compatible with the P1015 and P1024 products and software compatible with the P1011/P1020 and P2010/P2020, offering a six-chip range of cost- effective solutions. Scaling from a single core at 400 MHz (P1016) to a dual core at 1.2 GHz per core (P2020), together these QorIQ platforms deliver an impressive 4.5x aggregate frequency range. The P1016 and P1025 platforms both feature the e500 Power Architecture core and peripherals, and are fully software compatible with existing PowerQUICC processors. This enables customers to create a product with multiple performance points from a single board design. The P1025 dual-core processor supports both symmetric and asymmetric processing, enabling customers to further optimize their design with the same applications running across each core or serialize their application using the cores for different processing tasks. QorIQ P1016 and P1025 Block Diagram QorIQ P1016 and P1025 Block Diagram QorIQ P1016 and P1025 Block Diagram Not on P1016 Not on P1016 Security DDR2/DDR3 Power Architecture Power Architecture Acceleration SDRAM Controller Security DDR2/DDR3 e500 Core e500 Core Power Architecture Power Architecture 256 KB Acceleration SDRAM Controller e500 Core e500 Core L2 Cache 256 KB XOR 32 KB 32 KB 32 KB 32 KB 2 L2 Cache DUART, 2x I C, Timers, L1 I Cache L1 D Cache L1 I Cache L1 D Cache XOR 32 KB 32 KB 32 KB 32 KB Interrupt Control, 2 DUART, 2x I C, Timers, L1 I Cache L1 D Cache L1 I Cache L1 D Cache SD/MMC, SPI, Interrupt Control, USB 2.0/ULPI SD/MMC, SPI, USB 2.0/ULPI Coherency Module Coherency Module Enhanced Local Bus System Bus Controller (eLBC) Enhanced Local Bus System Bus Controller (eLBC) 3x On-Chip NetworOn-Chip Networkk Gigabit QUICC Engine 3x On-Chip NetworOn-Chip Networkk 2x PCI 4-ch. DMA4-ch. DMA Ethernet Gigabit QUICC Engine Express ControllerController 2x PCI 4-ch. DMA4-ch. DMA Ethernet Express ControllerController UTOPIA-L2 TDM Ethernet 4-lane SerDes UTOPIA-L2 TDM Ethernet 4-lane SerDes Core Complex (CPU, L2 and Frontside CoreNet Platform Cache) Basic Peripherals and Interconnect Core Complex (CPU, L2 and Frontside CoreNet Platform Cache) Basic Peripherals and Interconnect Accelerators and Memory Control Networking Elements Accelerators and Memory Control Networking ElementsThe P1016 and P1025 processors have an in power-sensitive defense and industrial Four SerDes to 3.125 GHz multiplexed advanced set of features for ease of use. applications and outdoor environments less across controllers The 256 KB L2 cache offers incremental protected from the elements. The devices Two PCI Express controllers configuration to partition the cache between primary target applications are networking Two SGMII interfaces the two cores or to configure it as SRAM or and telecom linecards. QUICC Engine module stashing memory. The integrated security A multiservice router or business gateway UTOPIA-L2 engine supports the cryptographic algorithms requires a combination of high performance Up to two 10/100 Ethernet interfaces commonly used in IPsec, SSL, 3GPP and and a rich set of peripherals to support the other networking and wireless security Up to four T1/E1/J1/E3 or DS-3 serial data path throughputs and required system protocols. The memory controller offers interfaces functionality. The P1016 and P1025 devices future-proofing against memory technology Up to four HDLC interfaces with offer a scalable platform to develop a range migration with support for DDR3. It also 128 channels of HDLC of products that can support the same supports error correction codes, a baseline Up to four BISYNC interfaces feature set. The QUICC Engine module, as requirement for any high-reliability system. Up to four UART interfaces well as integrated 10/100/1000 Ethernet These processors integrate a rich set of controllers with classification and QoS SPI interfaces interfaces, including a multiprotocol SerDes, capabilities, are ideal for managing the data GPIO Gigabit Ethernet, QUICC Engine module, PCI path traffic between the LAN and WAN High-Speed USB controller (USB 2.0) Express and USB. The three 10/100/1000 interface. PCI Express ports can provide Host and device support Ethernet ports support advanced packet connectivity to IEEE 802.11n radio cards for Enhanced host controller interface (EHCI) parsing, flow control and quality of service wireless support, TDM for legacy phone features, as well as IEEE 1588 time- interfaces to support voice and the USB or ULPI interface to PHY stampingall ideal for managing the data SD/MMC interfaces can be used to support Enhanced secure digital host controller path traffic between the LAN and WAN local storage. The integrated security engine (eSDHC) interface. The QUICC Engine module provides can provide encrypted secure communications Serial peripheral interface UTOPIA-L2, TDM and 10/100 Ethernet for remote users with VPN support. Integrated security engine (SEC 3.3) interfaces as well as a programmable RISC Technical Specifications Crypto algorithm support includes 3DES, engine to offload protocol termination from the AES, RSA/ECC, MD5/SHA, ARC4, main CPU cores. Four SerDes lanes can be Dual (P1025) or single (P1016 high- Snow 3G and FIPS deterministic RNG performance Power Architecture e500 cores portioned across two PCI Express ports and Single-pass encryption/message two SGMII ports. The PCI Express ports can 36-bit physical addressing authentication for common security provide connectivity to IEEE 802.11n radio Double-precision floating-point support protocols (e.g., IPsec, SSL, SRTP, WiMAX) cards for wireless support. USB or SD/MMC 32 KB L1 instruction cache and 32 KB L1 XOR acceleration interfaces can be used to support local data cache for each core storage. Multiple memory connection ports 32-bit DDR3 SDRAM memory controller 400667 MHz core clock frequency are available, including the 16-bit local bus, a with ECC support 256 KB L2 cache with ECC, also USB 2.0 controller, enhanced secure digital Programmable interrupt controller (PIC) configurable as SRAM and stashing memory host controller (eSDHC) and serial peripheral compliant with OpenPIC standard interface (SPI). Three 10/100/1000 Mb/s enhanced Four-channel DMA controller threespeed Ethernet controllers (eTSECs) 2 Target Applications Two I C controllers, DUART, timers TCP/IP acceleration and classification Enhanced local bus controller (eLBC) The P1016 and P1025 processors serve in a capabilities Sixteen general-purpose I/O signals wide variety of applications. The devices are IEEE 1588 support well suited for various combinations of data Package: 561-pin wirebond power-BGA Lossless flow control plane and control plane workloads in (TEPBGA1) RGMII, SGMII networking and telecom applications. With High-speed interfaces (not all available an available junction temperature range of simultaneously) 40 C to +125 C, the devices can be used For more information, please visit freescale.com/QorIQ Freescale, the Freescale logo, PowerQUICC and QorIQ are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. QUICC Engine and CoreNet are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are trademarks and service marks licensed by Power.org. 2010, 2013, 2015 Freescale Semiconductor, Inc. Document Number: QP1025FS REV 4