QorIQ Multicore Processor Development P2041 Reference Design Board Also supporting P2040 2 tool to check behaviors on the board local bus, four I C and SPI. It also includes the compared to behaviors seen on customer accelerator blocks collectively known as the boards. It can be used for software Data Path Acceleration Architecture (DPAA) development and performance evaluation that offload various tasks from the core, prior to the customers own board being including routine packet handling, security ready. While the P2041RDB uses the superset algorithm calculation and pattern matching. P2041 device, it can also be configured The P2041RDB offers significant flexibility to look like the more cost-effective subset in allocating its 10 SerDes lanes to various device, the P2040. functions. Its base configuration supports The P2041 processor is based upon the three SGMII ports and two RGMII ports, a e500mc core, built on Power Architecture 2-lane PCI Express slot, and two SATA ports Overview technology, offering speeds of 12001500 (one populated with a 320 GB hard drive). The P2041RDB is a compact (micro-ATX), MHz. It has a three-level cache hierarchy with In other configurations, it can have two 4-lane highly integrated reference design board 32 KB of instruction and data cache per core, PCI Express slots, which can be populated featuring the quad-core P2041 device. With 128 KB of unified backside L2 cache per with off-the-shelf PCI Express cards or its 1.5 GHz P2041 and rich input/output (I/O) core, and 1 MB of shared frontside CoreNet Freescales XAUI-RISER card. mix, the board is designed for evaluating platform cache fronting the memory controller. the P2041 and P2040 in networking and The P2041RDB memory system supports I/Os include 10 SerDes lanes running at up to Ethernet-centric applications, such as 4 GB of DDR3 at 1333 MHz. It has 128 MB 5 GHz, multiplexed across three PCI Express 2 control plane and mixed control plane/data of NOR flash, a 256 KB I C EEPROM and 16 Gen2 controllers, one 10 gigabit Ethernet (GE) plane in switches and routers, unified threat MB of SPI memory. It also includes two USB XAUI interface, five 1 GE SGMII interfaces, management, base station network interface 2.0 receptacles and an SD card slot. four 2.5 Gb/s SGMII interfaces, two Serial and baseband cards, aerospace and defense, The P2041RDB is pre-loaded with an RapidIO (version 1.3 with features of version multifunction printers and factory automation. Embedded Linux Essentials for QorIQ 2.1) interfaces, two SATA 2.0 interfaces and The P2041RDB can help shorten your time Processors with Data Path Acceleration the high-speed Aurora debug interface. It has to market. The board, which exercises development kit. This kit includes a 2.6.x.x a 64-bit DDR3 and DDR3L (low power) DRAM most capabilities of the device, can serve SMP Linux kernel, hugetlbfs for applications interface with 8-bit ECC support running at as a reference for the customers hardware with a large memory footprint, user space up to 1333 MHz data rate. It includes two development. It can also be used as a debug DPAA for high-performance packet handling, USB 2.0 interfaces (including PHY), two dual u-boot, the GCC tool chain and Mentor universal asynchronous receiver/transmitters System Builder, among many other features. (DUARTs), an SD/MMC interface, a 16-bit P2041RDB P2041RDB On-Board ATX Power Conn POR Reset PLD Clocking Power Circuit x64 DDR3 SODIMM (4 GB) QorIQ P2041 x16 128 MB NOR Flash SGMII 1 PHY RJ-45 SPI EEPROM x2 SGMII 2 Bank1 Lanes C, D PHY RJ-45 Lanes E, F, H PCI Express x4 Lane G Slot 1 DeMux SerDes USB Conn x2 SGMII 3 PHY RJ-45 Type A Lane C,D x2 2x SATA Connector RS232 DB 9 Lane C,D Serial DeMux Bank2 PCI Express x4 Lanes B Slot 2 Lane A SD/MMC DeMux Lane A Aurora Header JTAG COP eTSEC IEEE 1588 Probe Hole 2 RGMII 1 I C DeMux Temp Sensor EEPROM RTC IEEE 1588 PHY RJ-45 GPIO Header RGMII 2 PHY RJ-45 Freescale Technology PCI Express DUART P2041RDB Board Features Two x4 PCI Express slots Two DUAR T DB9 ports Processor Each DB9 supports two UAR Ts, each up SATA P2041, 1.5 GHz core with 1333 MHz to 115200 bps DDR3 data rate One inter nal 2.5 SATA 2.0 drive, 320 GB Debug Multiple SysClk inputs for generating One extra SATA connector various device frequencies JTAG/COP USB 2.0 Switch to change system version register Aurora high-speed connector Two High-Speed USB controllers from P2041 to P2040 personality Other Two USB 2.0 Type A receptacles Memory IEEE 1588 connector for Symmetricom Ethernet 4 GB unbuffered DDR3 SDRAM SO-DIMM option card (64-bit bus), 1333 MHz data rate Supports five 10/100/1000 ports with no 2 Real-time clock on I C add-in cards 128 MB NOR flash single-chip memory 2 Temperature sensor on I C dTSEC1dTSEC3 as SGMII to PHY: 2 256 KB M24256 I C EEPROM Eight general purpose I/Os Vitesse VSC8221 16 MB SPI memory dTSEC4dTSEC5 as RGMII to PHY: SD connector to interface with an SD Vitesse VSC8641 memory card 10 GE can be supported with Freescales optional XAUI-RISER card For more information, visit freescale.com/QorIQ Freescale, the Freescale logo and QorIQ are trademarks of FreescaleSemiconductor,Inc., Reg. U.S. Pat. & Tm. Off. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are trademarks and service marks licensed by Power.org. All other product or service names are the property of their respective owners. 2011FreescaleSemiconductor,Inc. Document Number: P2041RDBFS / REV 1