PCA9554B PCA9554C 2 Low-voltage 8-bit I C-bus and SMBus low power I/O port with interrupt, weak pull-up Rev. 2 4 August 2015 Product data sheet 1. General description The PCA9554B and PCA9554C are low-voltage 8-bit General Purpose Input/Output 2 (GPIO) expanders with interrupt and weak pull-up resistors for I C-bus/SMBus 2 applications. The only difference between the PCA9554B and PCA9554C is their I C fixed 2 address allowing a larger number of the same device on the I C-bus with no chance of address conflict. NXP I/O expanders provide a simple solution when additional I/Os are needed while keeping interconnections to a minimum, for example, in ACPI power switches, sensors, push buttons, LEDs, fan control, etc. In addition to providing a flexible set of GPIOs, the wide V range of 1.65 V to 5.5 V allow DD the PCA9554B/PCA9554C to interface with next-generation microprocessors and microcontrollers where supply levels are dropping down to conserve power. The PCA9554B/PCA9554C contain a register set of 8-bit Configuration, Input, Output, and Polarity Inversion registers. The PCA9554B is a pin-to-pin replacement for the PCA9554, while the PCA9554C replaces the PCA9554A. Both of these devices replace other industry-standard part numbers. More fully-featured parts PCAL9554B and PCAL9554C are also available with Agile I/O features. See the respective data sheet for more details. The PCA9554B/PCA9554C open-drain interrupt (INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed. INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data 2 on its ports without having to communicate via the I C-bus. Thus, the PCA9554B/PCA9554C can remain a simple slave device. The device outputs have 25 mA sink capabilities for directly driving LEDs while consuming low device current. The power-on reset sets the registers to their default values and initializes the device state machine. All input/output pins have weak pull-up resistors connected to them to eliminate external components. 2 Three hardware pins (A0, A1, A2) select the fixed I C-bus address and allow up to eight 2 devices to share the same I C-bus/SMBus. The PCA9554B and PCA9554C differ only in 2 2 their base I C-bus addresses permitting a total of 16 devices on the I C-bus, minimizing the chance for address conflict, even in the most complex system.PCA9554B PCA9554C NXP Semiconductors 2 Low-voltage 8-bit I C-bus/SMBus low power I/O port 2. Features and benefits 2 I C-bus to parallel port expander Operating power supply voltage range of 1.65 V to 5.5 V Low standby current consumption: 1.5 A (typical at 5 V V ) DD 1.0 A (typical at 3.3 V V ) DD Schmitt-trigger action allows slow input transition and better switching noise immunity at the SCL and SDA inputs V =0.10 V (typical) hys DD 5 V tolerant I/Os Open-drain active LOW interrupt output (INT) 2 400 kHz Fast-mode I C-bus Input/output configuration register Polarity inversion register Internal power-on reset Power-up with all channels configured as inputs with weak pull-up resistors No glitch on power-up Latched outputs with 25 mA drive maximum capability for directly driving LEDs Latch-up performance exceeds 100 mA per JESD78, Class II ESD protection exceeds JESD22 2000 V Human Body Model (A114-A) 1000 V Charged-Device Model (C101) Packages offered: TSSOP16 and HVQFN16 PCA9554B PCA9554C All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 2 4 August 2015 2 of 36