PCA9556PW,112 NXP

INTEGRATED CIRCUITS PCA9556 2 Octal SMBus and I C registered interface Product data 2002 Mar 28 Supersedes data of 2000 Nov 13 Philips Semiconductors Product data 2 Octal SMBus and I C registered interface PCA9556 The power-on reset puts the registers in their default state and initializes the SMBus state machine. The RESET pin causes the same reset/initialization to occur without depowering the part. 2 The PCA9557 8-bit I C SMBus I/O port with reset is the higher performance pin-for-pin replacement for the PCA9556. PIN CONFIGURATION V 1 16 DD SCL SDA 2 15 RESET FEATURES I/O7 A0 3 14 SMBus compliance with fixed 3.3V voltage levels A1 I/O6 4 13 A2 I/O5 Operating power supply voltage range of 3.0 V 5.5 V 5 12 I/O4 I/O0 6 11 Active high polarity inverter register I/O1 I/O3 7 10 Each I/O is configurable as an input or output V I/O2 SS 8 9 su01045 Active low reset pin Figure 1. Pin configuration Low leakage current on power-down Noise filter on SCL/SDA inputs PIN DESCRIPTION No glitch on power-up PIN SYMBOL FUNCTION NUMBER Internal power-on reset 1 SCL Serial clock line 8 I/O pins which default to 8 inputs 2 SDA Serial data line High impedance open drain on I/O0 3 A0 Address input 0 ESD protection exceeds 2000 V HBM per JESD22-A114, 4 A1 Address input 1 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101 5 A2 Address input 2 Latch-up testing is done to JESDEC Standard JESD78 which 6 I/O0 I/O0 (open drain) exceeds 100 mA 7 I/O1 I/O1 8 V Supply GROUND SS 914 I/O2I/O7 I/O2 to I/O7 DESCRIPTION The PCA9556 is a silicon CMOS circuit which provides parallel 15 RESET External reset (active LOW) input/output expansion for SMBus applications. The PCA9556 16 V Supply voltage DD consists of an 8-bit input port register, 8-bit output port register, and an SMBus interface. It has low current consumption and a high impedance open drain output pin, I/O0. The SMBus system master can reset the PCA9556 in the event of a timeout by asserting a LOW on the reset input. The SMBus system master can also invert the PCA9556 inputs by writing to the active HIGH polarity inversion bits. Finally, the system master can enable the PCA9556s I/Os as either inputs or outputs by writing to the configuration register. ORDERING INFORMATION PACKAGES TEMPERATURE RANGE ORDER CODE DRAWING NUMBER 16-Pin Plastic TSSOP 40 to +85 C PCA9556PW SOT403-1 Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging. 2 SMBus as specified by the Smart Battery System Implementers Forum is a derivative of the Philips I C patent. 2 I C is a trademark of Philips Semiconductors Corporation. 2 2002 Mar 28 853-2138 27929