PDTC143EQA NXP

PDTC143/114/124/144EQA series 50 V, 100 mA NPN resistor-equipped transistors Rev. 1 30 October 2015 Product data sheet 1. Product profile 1.1 General description 100 mA NPN Resistor-Equipped Transistor (RET) family in a leadless ultra small DFN1010D-3 (SOT1215) Surface-Mounted Device (SMD) plastic package with visible and solderable side pads. Table 1. Product overview Type number R1 R2 Package NXP PNP complement PDTC143EQA 4.7 k 4.7 k DFN1010D-3 PDTA143EQA (SOT1215) PDTC114EQA 10 k 10 k PDTA114EQA PDTC124EQA 22 k 22 k PDTA124EQA PDTC144EQA 47 k 47 k PDTA144EQA 1.2 Features and benefits 100 mA output current capability Reduced pick and place costs Built-in bias resistors Low package height of 0.37 mm Simplifies circuit design AEC-Q101 qualified Reduces component count Suitable for Automatic Optical Inspection (AOI) of solder joint 1.3 Applications Digital applications Controlling IC inputs Cost saving alternative for Switching loads BC847/BC857 series in digital applications 1.4 Quick reference data Table 2. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V collector-emitter voltage open base - - 50 V CEO I output current - - 100 mA O DFN1010D-3PDTC143/114/124/144EQA series NXP Semiconductors 50 V, 100 mA NPN resistor-equipped transistor 2. Pinning information Table 3. Pinning Pin Symbol Description Simplified outline Graphic symbol 1 I input (base) O 2 GND GND (emitter) 1 R1 I 3 O output (collector) 4 3 4 O output (collector) R2 GND 2 aaa-019964 Transparent top view 3. Ordering information Table 4. Ordering information Type number Package Name Description Version PDTC143EQA DFN1010D-3 plastic thermal enhanced ultra thin small outline SOT1215 package no leads 3 terminals PDTC114EQA body: 1.1 1.0 0.37 mm PDTC124EQA PDTC144EQA PDTC143 114 124 144EQA SER All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 1 30 October 2015 2 of 21