Multi-threaded SoCs deliver high performance per watt QorlQ T4240, T4160 and T4080 Multicore Processors The QorIQ T4 family is the flagship of the QorIQ T series. Advanced 28 nm process technology, integration, new higher speed I/O, clustered memory subsystems, hardware acceleration and power management give the T4 family a very high performance profile in an embedded power envelope. The T4240 advanced multicore processor features 12 physical Storage controllers: FCoE bridging, iSCSI controller, and 24 virtual high performance cores scaling up to 1.8 GHz. SAN controller The T4 family is joined by the T4160 (16 virtual cores) and Aeronautics, defense and government: Radar imaging, T4080 (eight virtual cores) processors, and the family has a 3x ruggedized network appliance, cockpit display performance scaling factor within a pin-compatible package. Industrial computing: Single-board computers, The T4 family features sophisticated support for hardware test equipment and software virtualization solutions. FEATURES OF DISTINCTION TARGET MARKETS AND APPLICATIONS T4080 T4160 T4240 The T4 family is ideal for combined control and data Cores (Dual Threaded) 4 8 12 plane processing. Like other QorIQ devices, the T4 family L2 Cache 2 MB 4 MB 6 MB of processors high level of integration offers significant CoreNet Platform Cache 1 MB 1 MB 1.5 MB space, weight and power benefits compared to multiple DDR Controllers 2 2 3 discrete devices. SerDes Lanes 24 24 36 Max 10 Gbit/s Ethernet 2 2 4 Service provider networking: RNC, metro networking, Max 1 Gbit/s Ethernet 13 13 16 gateway, core/edge router, EPC, CRAN, ATCA and PCIe Controllers 3 3 4 AMC solutions Enterprise equipment: Router, switch services, UTM Data centers: NFV, SDN, ADC, WOC, UTM, proxy, server appliance, PCI Express (PCIe) offloadQORIQ T4240 PROCESSOR BLOCK DIAGRAM ADVANCED CORES QorIQ T4240 PROCESSOR BLOCK DIAGRAM The T4 family of processors are based T1 T2 T1 T2 T1 T2 T1 T2 512 KB CoreNet 64-bit DDR3/3 L on the new Power Architecture e6500 Platform Cache Memory Controller Power Power Power Power Architecture Architecture Architecture Architecture core. The e6500 uses a 64-bit seven- e6500 e6500 e6500 e6500 512 KB CoreNet 64-bit DDR3/3 L Platform Cache Memory Controller 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB 32 KB stage pipeline for low latency response D-Cache I-Cache D-Cache I-Cache D-Cache I-Cache D-Cache I-Cache 512 KB CoreNet 64-bit DDR3/3 L to unpredictable code execution paths, Platform Cache Memory Controller 2 MB Banked L2 boosting single-threaded performance. Security Fuse Processor CoreNet Coherency Fabric Security Monitor The e6500 also offers higher aggregate Peripheral Access PAMU PAMU PAMU PAMU 2 x USB 2.0 w/PHY Management Unit instructions per clock at lower power with IFC Frame Manager Frame Manager Real-Time Debug RapidI O an innovative fused core approach 3 x DCE Security Queue Parse, Classify, Parse, Classify, Power Management Message Watchpoint DMA 1.0 5.0 Mgr. Distribute Distribute Cross Unit to threading. The e6500 cores fully SD/MMC Trigger HiGig DCB HiGig DCB 4 x DUART resourced dual threads provide 1.7 times Perf. Pattern 1GE 1GE 1GE 1GE Trace Monitor 2 4 x I C Match Buffer 1/ 1/ 1/ 1/ RMAN the performance of a single thread. Mgr. 1GE 1GE 1GE 1GE Engine 10G 10G 10G 10G 2.0 SPI, GPIO Aurora 1GE 1GE 1GE 1GE The e6500 cores are clustered in banks 16-Lane 10 GHz SerDes 16-Lane 10 GHz SerDes of four cores sharing a 2 MB L2 cache, Core Complex (CPU, L2, L3 Cache) Basic Peripherals and Interconnect Accelerators and Memory Control Networking Elements allowing efficient sharing of code and data within a multicore cluster. Each e6500 core implements the AltiVec technology DATA PATH ACCELERATION SYSTEM PERIPHERALS AND SIMD engine, dramatically boosting the ARCHITECTURE (DPAA) NETWORKING performance of heavy math algorithms The T4 family of processors enhances For networking, there are dual FMANs with DSP-like performance. The e6500 the QorIQ DPAA, an innovative with an aggregate of up to 16 any-speed core features include: multicore infrastructure for scheduling MAC controllers that connect to PHYs, Up to 1.8 GHz dual-threaded operation work to cores (physical and virtual), switches and backplanes over RGMII, 7 DMIPS/MHz per core hardware accelerators and network SGMII, QSGMII, HiGig2, XAUI, XFI and interfaces. The FMAN, a primary 10Gbase-KR. The FMAN also supports Advanced power saving modes, element of the DPAA, parses new quality-of-service features through including state retention power gating headers from incoming packets and egress traffic shaping and priority classifies and selects data buffers flow control for data center bridging VIRTUALIZATION with optional policing and congestion in converged data center networking The T4 family of processors includes management. The FMAN passes its applications. High-speed system support for hardware-assisted work to the QMAN, which assigns expansion is supported through four PCI virtualization. The e6500 core offers an it to cores or accelerators with a Express controllers that support varieties extra core privilege level (hypervisor) multilevel scheduling hierarchy. The of lane lengths for PCIe specification and hardware offload of logical to T4240 processors implementation 3.0, including endpoint SR-IOV with real address translation. In addition, of the DPAA offers accelerators for 128 virtual functions. Other peripheral the T4 family of processors includes cryptography, enhanced regular interfaces include SRIO, Interlaken-LA, platform-level enhancements supporting 2 expression pattern matching and SATA, SD/MMC, I C, UART, SPI, a NOR/ I/O virtualization with DMA memory compression/decompression. NAND controller, GPIO and a 1866 MT/s protection through IOMMUs and DDR3L controller. configurable storage profiles that DPAA HARDWARE ACCELERATORS provide isolation of I/O buffers between guest environments. Virtualization Frame Manager (FMAN) 50 Gbit/s classify, parse and distribute software for the T4 family includes kernel Buffer Manager (BMAN) 64 buffer pools virtualization machine (KVM), Linux containers, hypervisor and commercial 24 Queue Manager (QMAN) Up to 2 queues virtualization software from Enea , RapidIO Manager (RMAN) Seamless mapping to DPAA Green Hills Software , Mentor Graphics Security (SEC) 40 Gbit/s: 3 DES, AES 20 Gbit/s: Kasumi/F8 and Wind River. Pattern Matching Engine (PME) 10 Gbit/s Data Compression Engine (DCE) 20 Gbit/s aggregate Interlaken LA-1 SATA 2.0 SATA 2.0 PCIe PCIe PCIe PCIe SRIO SRIO