TFF11084HN/N1,111 NXP

TFF11084HN Low phase noise LO generator for VSAT applications Rev. 2 14 April 2011 Product data sheet 1. General description The TFF11084HN is a K band frequency generator intended for low phase noise Local u Oscillator (LO) circuits for K band VSAT transmitters and transceivers. The specified u phase noise complies with IESS-308 from Intelsat. CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling. 2. Features and benefits Phase noise compliant with IESS-308 (Intelsat) in combination with appropriate source LO generator with VCO range from 8.20 GHz to 8.60 GHz Input signal 32 MHz to 538 MHz Divider settings 16, 32, 64, 128 or 256 Output level 4 dBm stability 2 dB Third or fourth order PLL Internally stabilized voltage references for loop filter 3. Applications VSAT up converters Local oscillator signal generation 4. Quick reference data Table 1. Quick reference data Operating conditions of Table 10 apply. Symbol Parameter Conditions Min Typ Max Unit V supply voltage 3.0 3.3 3.6 V CC I supply current - 100 130 mA CC f RF output frequency 8.20 - 8.60 GHz o(RF) synthesizer phase noise divider value = 64 at 100 kHz offset reference - 97 92 dBc/Hz n(synth) phase noise is 149 dBc/Hz at 100 kHz offset RL output return loss measured at demo board and de-embedded to - 10 - dB out footprint reference spurious suppression measured at divider value = 256 - - 70 dBc sup(sp)refTFF11084HN NXP Semiconductors Low phase noise LO generator for VSAT applications 5. Ordering information Table 2. Ordering information Type number Package Name Description Version TFF11084HN HVQFN24 plastic thermal enhanced very thin quad flat package SOT616-1 no leads 24 terminals body 4 4 0.85 mm 6. Marking Table 3. Marking codes Type number Marking code TFF11084HN T084 7. Block diagram NSL2 NSL1 NSL0 VTUNE CPOUT VREGVCO 6 5 4 3 2 1 10 pF 100 k 100 k 100 k pull up pull up pull up 30 pF V CC(DIV) (3.3 V) lock: 2.5 V no lock: 0 V 7 WINDOW 2.7 V 24 LCKDET GND3(BUF) DETECTOR 100 k pull down 8 23 GND1(REF) BUF2 P V CC(BUF) R R BUF N BUF P 50 50 VCO 9 22 IN(REF) P CPOUT VTUNE BUF1 P PFD CP DIVIDER 10 21 IN(REF) N BUF2 N NSL0 NSL1 NSL2 11 20 GND2(REF) BUF1 N 12 19 V GND2(BUF) CC(REF) 13 14 15 16 17 18 V GND(DIV) n.c. n.c. GND1(BUF) V 001aal724 CC(DIV) CC(BUF) Fig 1. Block diagram TFF11084HN All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 14 April 2011 2 of 17