TJA1024 Quad LIN 2.2A/SAE J2602 transceiver Rev. 1 12 February 2015 Product data sheet 1. General description The TJA1024 is a quad LIN transceiver that provides the interface between a Local Interconnect Network (LIN) master/slave protocol controller and the physical bus in a LIN network. It comprises two independent and separated dual LIN transceiver blocks on a single die (only the ground pins GND1 and GND2 are connected internally) with dedicated supply pins (V for LIN 1/LIN2 and V for LIN3/LIN4). BAT1 BAT2 The TJA1024 is primarily intended for in-vehicle subnetworks using baud rates up to 20 kBd and is compliant with LIN 2.0, LIN 2.1, LIN 2.2, LIN 2.2A and SAE J2602. The TJA1024 is software compatible with the TJA1022, TJA1027 and TJA1029. The transmit data streams generated by the protocol controller are converted by the TJA1024 into optimized bus signals shaped to minimize ElectroMagnetic Emissions (EME). The LIN bus output pins are pulled HIGH via internal termination resistors. For a master application, an external resistor in series with a diode should be connected between pin V and the respective LIN pins. The receivers detect receive data streams BATx on the LIN bus input pins and transfer them via pins RXDx to the microcontroller. Power consumption is very low when all four transceivers are in Sleep mode. However, the TJA1024 can still be woken up via pins LINx and SLPx N. 2. Features and benefits 2.1 General Four LIN transceivers in a single package LIN 2.0, LIN 2.1, LIN 2.2, LIN 2.2A and SAE J2602 compliant Baud rate up to 20 kBd Very low EME Very low current consumption in Sleep mode with remote LIN wake-up Input levels compatible with 3.3 V and 5 V devices Integrated termination resistors for LIN slave applications Passive behavior in unpowered state Operational during cranking pulse: full operation from 5 V upwards Undervoltage detection K-line compatible Leadless DHVQFN24 package (3.5 mm 5.5 mm) with improved Automated Optical Inspection (AOI) Dark green product (halogen free and Restriction of Hazardous Substances (RoHS) compliant) Software-compatible with the TJA1022, TJA1027 and TJA1029TJA1024 NXP Semiconductors Quad LIN 2.2A/SAE J2602 transceiver 2.2 Protection Very high ElectroMagnetic Immunity (EMI) Very high ESD robustness: 8 kV according to IEC 61000-4-2 for pins LINx and V BATx Bus terminal and battery pins protected against transients in the automotive environment (ISO 7637) Bus terminal short-circuit proof to battery and ground Thermally protected Initial TXD dominant check when switching to Normal mode TXD dominant time-out function 3. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V battery supply voltage pins V and V limiting values 0.3 - +42 V BAT BAT1 BAT2 operating range 5 - 18 V I battery supply current per pin (V or V ): BAT BAT1 BAT2 Sleep mode (both channels) bus recessive 2.5 7 10 A (both channels) V =V V =0V LINx BATx SLPx N Standby mode (both channels) bus recessive 2.5 7 10 A (both channels) V =V V =0V LINx BATx SLPx N Normal mode (both channels) bus recessive 300 1600 3200 A (both channels) V =5 V V = V TXDx LINx BATx V =5 V SLPx N V voltage on pin LIN pins LIN1, LIN2, LIN3 and LIN4 limiting value 42 - +42 V LIN with respect to GND and V BAT V electrostatic discharge voltage on pins LIN1, LIN2, LIN3, LIN4, V and V 8- +8 kV ESD BAT1 BAT2 according to IEC 61000-4-2 T virtual junction temperature 40 - +150 C vj 4. Ordering information Table 2. Ordering information Type number Package Name Description Version TJA1024HG DHVQFN24 plastic dual in-line compatible thermal enhanced very thin quad flat SOT815-1 package no leads 24 terminals body 3.5 5.5 0.85 mm TJA1024 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 1 12 February 2015 2 of 25