Freescale Semiconductor, Inc. MPC823ETS/D 6/99 Technical Summary MPC823e Mobile Computing Microprocessor The MPC823e microprocessor is a versatile, one-chip integrated microprocessor and peripheral combination that can be used in a variety of electronic products. It particularly excels in low-power, portable, image capture and personal communication products. It is a version of the MPC823 microprocessor that provides enhanced performance with larger data and instruction caches. Like the MPC823, it has a universal serial bus (USB) interface and video display controller, as well as the existing LCD controller of the MPC823 (Rev A) device. core with a The MPC823e microprocessor integrates a high-performance embedded PowerPC communication processor module that uses a specialized RISC processor for imaging and communication. The communication processor module can perform embedded signal processing functions for image compression and decompression. It also supports seven serial channelstwo 2 serial communication controllers, two serial management controllers, one I C port, one USB channel, and one serial peripheral interface. This two-processor architecture consumes power more efciently than traditional architectures because the communication processor module frees the core from peripheral tasks like imaging and communication. For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc... Freescale Semiconductor, Inc. Key Features The following list summarizes key features of the MPC823e: Embedded PowerPC Core Provides 99MIPS (Using Dhrystone 2.1) or 172K Dhrystones 2.1 at 75MHz Single-Issue, 32-Bit Version of the PowerPC Core (Fully Compatible with the PowerPC Architecture Denition) with 32 x 32-Bit Fixed-Point Registers Low Power Consumption, 3.3V I/O Boundary with Microprocessor Core, Caches, Memory Management, and I/O in Operation Performs Branch Folding, Branch Prediction with Conditional Prefetch, without Conditional Execution 8K Data Cache and 16K Instruction Cache Instruction Cache is Four-Way, Set Associative and the Data Cache is Two-Way, Set-Associative, Physical Address, 4-Word Line Burst, LRU Replacement Algorithm, Lockable Online Granularity Memory Management Units with 32-Entry Translation Lookaside Buffers (TLBs) and Fully Associative Instruction and Data TLBs Memory Management Units Support Multiple Page Sizes of 4K, 16K, 512K and 8M (1K Protection Granularity at the 4K Page Size) 16 Virtual Address Spaces and 16 Protection Groups Advanced On-Chip Emulation Debug Mode Data Bus Dynamic Bus Sizing for 8-,16-, and 32-Bit Buses Supports Traditional 68K Big-Endian, Traditional x86 Little-Endian, and PowerPC Little-Endian Memory Systems Twenty-Six External Address Lines Completely Static Design (075MHz Operation) External Bus Division Factor (EBDF) Should be Divided by 2 for Frequencies Greater than 50MHz Communication Processor Module Interfaces to PowerPC Core through On-Chip Dual-Access RAM and Virtual (Serial) DMA Channels on a Dedicated DMA Accelerator Programmable Memory-to-Memory and Memory-to-I/O (including Flyby) DMA Provided by Virtual DMA Support CPM Provides 75+MIPS 75MHz in Parallel with PowerPC Core Protocols Supported by ROM or Download Microcode and the Hardware Serial Communication Controllers Include, but are not Limited to, the Digital Portions of: Ethernet/IEEE 802.3 (CS/CDMA) HDLC/SDLC and HDLC Bus AppleTalk Universal Asynchronous Receiver Transmitter (UART) Synchronous UART (USART) Totally Transparent Mode With/Without CRC Asynchronous HDLC IrDA Version 1.1 Serial Infrared (SCC2 only) Basic Rate ISDN (BRI) in Conjunction with Serial Management Controller Channels Primary Rate ISDN MPC823e Mobile Computing Microprocessor For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc...