Doc No. TA4-EA-06180 Revision. 2 Product Standards AN44140A Sine-wave PWM drive system and rotor position detection method by 1-Hall-sensor 1-Hall-Sensor Driver IC for 3-phase Brushless Motor FEATURES APPLICATIONS Supply voltage range: 6.0 V to 26.4 V Driver IC for 3-phase brushless fan motor Built-in 5-V regulator 3-phase full-wave sine-wave PWM drive by 1-Hall-sensor VSP pin linear input Drive phase shift control Rotation direction selectable (Forward/Reverse) FG pulse divide selectable Stand-by mode Various protection functions: under voltage lock out (UVLO), over voltage lock out (OVLO), thermal protection, over load protection, and over current protection 24-pin plastic quad flat non-lead package (QFN type, size: 4 mm 4 mm) DESCRIPTION AN44140A is a driver IC for 3-phase brushless motor optimized for fan motors. By employing the rotor position detector and sine wave PWM drive by 1-Hall-sensor, this IC achieves component reduction and miniaturization of motor set as well as motor drive at low noise, low vibration and low power consumption. SIMPLIFIED APPLICATION AN44140A 3-phase full-wave sine-wave PWM drive V / A VU C BC C SST VV SST BC1 19 12 PS U 20 11 FGSEL V 21 10 R VW VSP RCSF RCSF 22 9 R RCSS FR RCSS 23 8 C RCSS RD W 24 7 R IU RD1 IV IW 5ms/div time s Condition ) V =12V V =0V V =5V V =5V CC FR PS FGSEL V =5V C =0.1uF FAN-Motor SP SST Notes) This application circuit is an example. The operation of mass production set is not guaranteed. You should perform enough evaluation and verification on the design of mass production set. You are fully responsible for the incorporation of the above application circuit and information in the design of your equipment. Page 1 of 23 Established : 2013-04-19 Revised : 2013-11-21 R C FG1 FG OSC OSC 1 18 SLEEP H1L 2 17 R VH1 C VREG VREG H1H 3 16 GND R VH2 VPUMP 4 15 C VCC1 VCC C VCC VPUMP 5 14 VHALL BC2 6 13 C VCCDoc No. TA4-EA-06180 Revision. 2 Product Standards AN44140A ABSOLUTE MAXIMUM RATINGS Parameter Symbol Rating Unit Note Supply voltage V 28 V *1 CC Operating ambient temperature T 40 to +95 C *2 opr Storage temperature T 55 to +150 C *2 stg V /V /V /V /V SLEEP H1H H1L PS FGSEL -0.3 to 6.0 V /V /V Input Voltage Range VSP FR V /V -0.3 to 6.0 V *3 RCSS SST V /V -0.3 to 6.0 V FG RD V /V -0.3 to 6.0 V *3 VREG RCSF Output Voltage Range V 28 V *3 BC1 V /V 37 V *3 BC2 pump V -0.3 to V + 0.3 V *3 VHALL VREG I /I /I 2.2 A*4 U V W Input Current Range I /I 5mA FG RD I /I -10 mA *4, *5 VHALL VREG ESD HBM (Human Body Model) 2 kV Notes) This product may sustain permanent damage if subjected to conditions higher than the above stated absolute maximum rating. This rating is the maximum rating and device operating at this range is not guarantee able as it is higher than our stated recommended operating range. When subjected under the absolute maximum rating for a long time, the reliability of the product may be affected. *1: The values are defined, provided that the IC is used within all of the above absolute maximum ratings including the power dissipation. *2: All ratings are for T = 25C, except the power dissipation, operating ambient temperature, and storage temperature. a *3: Applying external voltage into these pins is prohibited. Set them not to exceed the ratings even in transient state. *4: Applying external current into these pins is prohibited. Set them not to exceed the ratings even in transient state. *5: The rated current of VREG and VHALL is defined as the sum of VREG and VHALL currents. POWER DISSIPATION RATING Condition PD (Ta=25 C) PD (Ta=70 C) j-a j-c 24 pin Plastic Quad Flat Non-leaded Package 97.7/W 10.5/W 1.279/W 0.818/W (QFN type) Note). For the actual usage, please refer to the PD-Ta characteristics diagram in the package specification, follow the power supply voltage, load and ambient temperature conditions to ensure that there is enough margin and the thermal design does not exceed the allowable value. *1: Glass-Epoxy Substrate (2 Layers) : 50500.8t (mm) , heat dissipation fin: Dai-pad , Soldered. CAUTION Although this has limited built-in ESD protection circuit, but permanent damage may occur on it. Therefore, proper ESD precautions are recommended to avoid electrostatic damage to the MOS gates Page 2 of 23 Established : 2013-04-19 Revised : 2013-11-21