Doc No. TT4-ZZ-02014 Revision. 1 Product Standards MOS FET FCAB21520L1 FCAB21520L1 Gate resistor installed Dual N-channel MOS FET Unit: mm For lithium-ion secondary battery protection circuits Features Source-source ON resistance:RSS(on) typ. = 1.6 m VGS = 3.8 V) CSP(Chip Size Package) Halogen-free / RoHS compliant (EU RoHS / UL-94 V-0 / MSL : Level 1) Marking Symbol: 7T Packaging Embossed type (Thermo-compression sealing) : 1 000 pcs / reel (standard) 1,2,4,5. Source1(FET1) 3. Gate1 (FET1) 6,7,9,10. Source2(FET2) 8. Gate2 (FET2) Absolute Maximum Ratings Ta = 25 C Panasonic TCSP1835011-N2 JEITA Parameter Symbol Rating Unit Source-source Voltage VSS 12 V Code VGS V Gate-source Voltage 8 *1 IS1 16 A DC Equivalent Circuit *2 Source Current IS2 35 A DC *3 ISp 160 A Pulse *1 W DC PD1 0.54 6,7,9,10(S2) 8(G2) Total Power Dissipation *2 PD2 3.8 W DC Channel Temperature Tch 150 C Tstg -55 to +150 Storage Temperature Range C FET2 *1 232 C/W Rth Thermal Resistance (ch-a) *2 33 C/W Rth Note *1 Mounted on FR4 board ( 25.4 mm 25.4 mm t1.0 mm ) FET1 using the minimum recommended pad size (36 m Copper ). *2 Mounted on Ceramic substrate (70 mm 70 mm t1.0 mm). 1,2,4,5(S1) 3(G1) *3 t = 10 s, Duty Cycle 1 % Page 1 of 5 Established : 2016-11-09 Revised : - - Doc No. TT4-ZZ-02014 Revision. 1 Product Standards MOS FET FCAB21520L1 Electrical Characteristics Ta = 25 C 3 C Parameter Symbol Conditions Min Typ Max Unit Source-source Breakdown Voltage VSSS IS = 1.0 mA, VGS = 0 V 12 V Zero Gate Voltage Source Current ISSS VSS = 12 V, VGS = 0 V 1.0 A VGS = 8 V, VSS = 0 V 10 Gate-source Leakage Current IGSS A VGS = 5 V, VSS = 0 V 1.0 Gate-source Threshold Voltage Vth IS = 1.64 mA, VSS = 10 V 0.35 0.90 1.40 V RSS(on)1 IS = 8.0 A, VGS = 4.5 V 1.1 1.45 2.0 RSS(on)2 IS = 8.0 A, VGS = 3.8 V 1.15 1.6 2.1 Source-source On-state Resistance m RSS(on)3 IS = 8.0 A, VGS = 3.1 V 1.2 1.8 3.0 RSS(on)4 IS = 8.0 A, VGS = 2.5 V 1.4 2.3 4.5 Body Diode Forward Voltage VF(s-s) IF = 8.0 A, VGS = 0 V 0.7 1.2 V *1 Ciss 5250 Input Capacitance *1 Coss VSS = 10 V, VGS = 0 V, f = 1 kHz 700 pF Output Capacitance *1 Crss 630 Reverse Transfer Capacitance *1,*2 td(on) 1.5 Turn-on Delay Time VDD = 6.0 V, VGS = 0 to 4.0 V s *1,*2 tr IS = 8.0 A 2.6 Rise Time *1,*2 td(off) VDD = 6.0 V, VGS = 4.0 to 0 V 6.8 Turn-off Delay Time s *1,*2 tf IS = 8.0 A 4.1 Fall Time *1 Qg VDD = 6.0 V 38 Total Gate Charge *1 Qgs VGS = 0 to 4.0 V 20 nC Gate-source Charge *1 Qgd IS = 8.0 A 10 Gate-drain Charge Note Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 Measuring methods for transistors. *1 Guaranteed by design, not subject to production testing *2 Measurement circuit for Turn-on Delay Time / Rise Time / Turn-off Delay Time / Fall Time Note2:Measurement circuit VDD = 6.0 V IS = 8.0 A RL = 0.75 Vout 90 % S2 Vin 10 % Rg G2 90 % 90 % Vout Rg G1 10 % 10 % Vin 4 V S1 0 V td(on) tr td(off) tf PW = 10 s D.C. 1 % 2 of 5 Page Established : 2016-11-09 Revised : - -