CMOS Static RAM
IDT71016S
1 Meg (64K x 16-Bit)
Description
Features
The IDT71016 is a 1,048,576-bit high-speed Static RAM organized
64K x 16 advanced high-speed CMOS Static RAM
as 64K x 16. It is fabricated using high-perfomance, high-reliability CMOS
Equal access and cycle times
technology. This state-of-the-art technology, combined with innovative
Commercial : 12/15/20ns
circuit design techniques, provides a cost-effective solution for high-speed
Industrial: 15/20ns
memory needs.
One Chip Select plus one Output Enable pin
The IDT71016 has an output enable pin which operates as fast as 7ns,
Bidirectional data inputs and outputs directly TTL-
with address access times as fast as 12ns. All bidirectional inputs and
compatible
outputs of the IDT71016 are TTL-compatible and operation is from a single
Low power consumption via chip deselect
5V supply. Fully static asynchronous circuitry is used, requiring no clocks
Upper and Lower Byte Enable Pins
or refresh for operation.
Commercial and industrial product available in 44-pin
The IDT71016 is packaged in a JEDEC standard 44-pin Plastic SOJ
Plastic SOJ package and 44-pin TSOP package
and 44-pin TSOP Type II.
Functional Block Diagram
Output
OE
Enable
Buffer
Address
Row / Column
A0 - A15
Buffers
Decoders
,
I/O 15
High
8
8
Chip
Byte
CS
Enable I/O
Buffer
Buffer
I/O 8
Sense
16
64K x 16
Amps
Memory and
Write
Array
Write
Drivers
WE
Enable I/O 7
Buffer Low
8 8
Byte
I/O
Buffer
I/O 0
BHE
Byte
Enable
Buffers
3210 drw 01
BLE
SEPTEMBER 2013
1
2013 Integrated Device Technology, Inc. DSC-3210/11IDT71016, CMOS Static RAM
1 Meg (64K x 16-bit) Commercial and Industrial Temperature Ranges
Pin Configurations Pin Descriptions
A0 - A15 Address Inputs Input
A4 1
A5 Chip Select Input
44 CS
A3 2
43 A6
WE Write Enable Input
A2 3
42 A7
OE Output Enable Input
A1 4 OE
41
A0
5 BHE
40
High Byte Enable Input
BHE
CS
6 BLE
39
Low Byte Enable Input
BLE
I/O 0 7 38 I/O 15
I/O 1 8 I/O0 - I/O15 Data Input/Output I/O
37 I/O 14
I/O 2
9 36 I/O 13
VCC 5.0V Power Pwr
I/O 3 10 I/O 12
35
VSS Ground Gnd
SO44-1
VCC 11 VSS
34
3210 tbl 01
VSS
12 VCC
33
SO44-2
,
I/O 4
13 I/O 11
32
I/O 5
14 I/O 10
31
I/O 6 I/O 9
15 30
I/O 7 I/O 8
16 29
WE NC
17 28
A15 18 A8
27
A14 19 A9
26
A13 A10
20 25
A12 A11
21 24
NC NC
22 23
3210 drw 02
SOJ/TSOP
Top View
(1)
Truth Table
CS OE WE BLE BHE
I/O0 - I/O7 I/O8 - I/O15 Function
H X X X X High-Z High-Z Deselected - Standby
L L H L H DATAOUT High-Z Low Byte Read
L L H H L High-Z DATAOUT High Byte Read
L L H L L DATAOUT DATAOUT` Word Read
L X L L L DATAIN DATAIN Word Write
L X L L H DATAIN High-Z Low Byte Write
L X L H L High-Z DATAIN High Byte Write
L H H X X High-Z High-Z Outputs Disabled
L X X H H High-Z High-Z Outputs Disabled
3210 tbl 02
NOTE:
1. H = VIH, L = VIL, X = Don't care.
6.42
2