HIGH SPEED 7132SA/LA 2K x 8 DUAL PORT 7142SA/LA STATIC RAM MASTER IDT7132 easily expands data bus width to 16-or-more Features bits using SLAVE IDT7142 High-speed access On-chip port arbitration logic (IDT7132 only) Commercial: 20/35/55/100ns (max.) BUSY output flag on IDT7132 BUSY input on IDT7142 Industrial: 25/55ns (max.) Battery backup operation 2V data retention (LA only) Military: 25/35/55/100ns (max.) TTL-compatible, single 5V 10% power supply Low-power operation Available in 48-pin DIP, LCC and Flatpack, and 52-pin PLCC IDT7132/42SA packages Active: 325mW (typ.) Military product compliant to MIL-PRF-38535 QML Standby: 5mW (typ.) Industrial temperature range (40C to +85C) is available for IDT7132/42LA selected speeds Active: 325mW (typ.) Green parts available, see ordering information Standby: 1mW (typ.) Functional Block Diagram OER OEL CEL CER R/WL R/WR I/OOL-I/O7L I/OOR-I/O7R I/O I/O Control Control m (1,2) BUSYL (1,2) BUSYR A10L A10R Address MEMORY Address Decoder ARRAY Decoder A0L A0R 11 11 ARBITRATION CEL CER LOGIC OER OEL R/WR R/WL 2692drw01 NOTES: 1. IDT7132 (MASTER): BUSY is open drain output and requires pullup resistor of 270. IDT7142 (SLAVE): BUSY is input. 2. Open drain output: requires pullup resistor of 270. 1 May.27.217132SA/LA and 7142SA/LA High Speed 2K x 8 Dual Port Static RAM Military, Industrial and Commercial Temperature Ranges Description The IDT7132/IDT7142 are high-speed 2K x 8 Dual-Port Static RAMs. a very low standby power mode. The IDT7132 is designed to be used as a stand-alone 8-bit Dual-Port RAM Fabricated using CMOS high-performance technology, these or as a MASTER Dual-Port RAM together with the IDT7142 SLAVE devices typically operate on only 325mW of power. Low-power (LA) Dual-Port in 16-bit-or-more word width systems. Using the IDT MASTER/ versions offer battery backup data retention capability, with each Dual- SLAVE Dual-Port RAM approach in 16-or-more-bit memory system Port typically consuming 200W from a 2V battery. applications results in full-speed, error-free operation without the need for The IDT7132/7142 devices are packaged in a 48-pin sidebraze or additional discrete logic. plastic DIPs, 48-pin LCCs, 52-pin PLCCs, and 48-lead flatpacks. Both devices provide two independent ports with separate control, Military grade product is manufactured in compliance with the latest address, and l/O pins that permit independent, asynchronous access for revision of MIL-PRF-38535 QML, making it ideally suited to military reads or writes to any location in memory. An automatic power down temperature applications demanding the highest level of performance feature, controlled by CE permits the on-chip circuitry of each port to enter and reliability. (1,2,3) Pin Configurations 42 41 40 39 38 37 36 35 34 33 32 31 43 30 OER I/O5R A10R 44 29 I/O4R BUSYR 28 45 I/O3R R/WR 46 27 I/O2R 26 I/O1R CER 47 7132/42 (4) FP48 VCC 25 I/O0R 48 CEL 24 GND 48-Pin Flatpack 1 Top View 23 I/O7L R/WL 2 3 22 I/O6L BUSYL A10L I/O5L 4 21 20 I/O4L OEL 5 19 I/O3L A0L 6 10 11 12 13 14 15 16 17 18 7 8 9 2692 drw 03F INDEX 18 17 16 15 14 13 12 11 10 9 8 7 19 6 A0L I/O3L 20 I/O4L 5 OEL A10L 21 4 I/O5L 22 3 BUSYL I/O6L 7132/42 I/O7L 23 2 (4) R/WL LC48 24 1 GND CEL 48-Pin LCC I/O0R 48 VCC 25 Top View 26 47 I/O1R CER 46 I/O2R 27 R/WR 28 45 I/O3R BUSYR A10R 29 44 I/O4R 43 I/O5R 30 OER 31 32 33 34 35 36 37 38 39 40 41 42 NOTES: 1. All VCC pins must be connected to the power supply. 2. All GND pins must be connected to the ground supply. 2692 drw 03L 3. LC48 package body is approximately .57 in x .57 in x .68 in. FP48 package body is approximately .75 in x .75 in x .11 in. 4. This package code is used to reference the package diagram. 2 May.27.21 A1L A0R A2L A1R A2R A3L A3R A4L A5L A4R A6L A5R A7L A6R A8L A7R A9L A8R I/O0L A9R I/O1L I/O7R I/O2L I/O6R I/O6R I/O2L I/O7R I/O1L A9R I/O0L A8R A9L A7R A8L A6R A7L A5R A6L A4R A5L A3R A4L A2R A3L A1R A2L A0R A1L