DATASHEET CA3240, CA3240A FN1050 Rev 6.00 Dual, 4.5MHz, BiMOS Operational Amplifier with MOSFET Input/Bipolar Output March 4, 2005 The CA3240A and CA3240 are dual versions of the popular Features CA3140 series integrated circuit operational amplifiers. They Dual Version of CA3140 combine the advantages of MOS and bipolar transistors on the same monolithic chip. The gate-protected MOSFET Internally Compensated (PMOS) input transistors provide high input impedance and MOSFET Input Stage a wide common-mode input voltage range (typically to 0.5V - Very High Input Impedance (Z ) 1.5T (Typ) IN below the negative supply rail). The bipolar output - Very Low Input Current (I ) 10pA (Typ) at 15V I transistors allow a wide output voltage swing and provide a - Wide Common-Mode Input Voltage Range (V ): Can ICR high output current capability. Be Swung 0.5V Below Negative Supply Voltage Rail The CA3240A and CA3240 are compatible with the industry Directly Replaces Industry Type 741 in Most Applications standard 1458 operational amplifiers in similar packages. Pb-Free Available (RoHS Compliant) Ordering Information Applications TEMP. PKG. o PART NUMBER RANGE ( C) PACKAGE DWG. Ground Referenced Single Amplifiers in Automobile and CA3240AE -40 to 85 8 Ld PDIP E8.3 Portable Instrumentation CA3240AEZ -40 to 85 8 Ld PDIP E8.3 Sample and Hold Amplifiers (See Note) (Pb-free) Long Duration Timers/Multivibrators (Microseconds- CA3240E -40 to 85 8 Ld PDIP E8.3 Minutes-Hours) CA3240EZ -40 to 85 8 Ld PDIP E8.3 Photocurrent Instrumentation (See Note) (Pb-free) Intrusion Alarm System Active Filters Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. Comparators Function Generators NOTE: Intersil Pb-free products employ special Pb-free material sets Instrumentation Amplifiers Power Supplies molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of Pinout IPC/JEDEC J STD-020. CA3240, CA3240A (PDIP) TOP VIEW Functional Diagram OUTPUT (A) 1 8 V+ INV. 2mA 4mA V+ 2 7 OUTPUT INPUT (A) INV. NON-INV. 3 6 INPUT (B) INPUT (A) BIAS CIRCUIT NON-INV. 4 5 V- CURRENT SOURCES INPUT (B) AND REGULATOR 200 A 1.6mA 200 A 2 A 2mA + OUT- PUT IN- A 10 A 10,000 A 1 PUT - C 1 12pF V- FN1050 Rev 6.00 Page 1 of 15 March 4, 2005CA3240, CA3240A Absolute Maximum Ratings Thermal Information o Supply Voltage (Between V+ and V-) . 36V Thermal Resistance (Typical, Note 2) ( C/W) JA Differential Input Voltage . 8V 8 Lead PDIP Package* 100 o Input Voltage . (V+ +8V) to (V- -0.5V) Maximum Junction Temperature (Plastic Package) . 150 C o o Input Current . 1mA Maximum Storage Temperature Range -65 C to 150 C o Output Short Circuit Duration (Note 1) Indefinite Maximum Lead Temperature (Soldering 10s) 300 C Operating Conditions *Pb-free PDIPs can be used for through hole wave solder process- ing only. They are not intended for use in Reflow solder processing o o Temperature Range -40 C to 85 C applications. Voltage Range . 4V to 36V or 2V to 18V CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Short circuit may be applied to ground or to either supply. Temperatures and/or supply voltages must be limited to keep dissipation within max- imum rating. 2. is measured with the component mounted on an evaluation PC board in free air. JA o Electrical Specifications For Equipment Design, V = 15V, T = 25 C, Unless Otherwise Specified SUPPLY A CA3240 CA3240A PARAMETER SYMBOL MIN TYP MAX MIN TYP MAX UNITS Input Offset Voltage V -5 15 - 2 5 mV IO Input Offset Current I - 0.5 30 - 0.5 20 pA IO Input Current I - 10 50 - 10 40 pA I Large-Signal Voltage Gain A 20 100 - 20 100 - kV/V OL (See Figures 12, 27) (Note 3) 86 100 - 86 100 - dB Common Mode Rejection CMRR - 32 320 - 32 320 V/V Ratio (See Figure 17) 70 90 - 70 90 - dB Common Mode Input Voltage Range V -15 -15.5 to 11 -15 -15.5 to 12 V ICR (See Figure24) +12.5 +12.5 Power Supply Rejection Ratio PSRR - 100 150 - 100 150 V/V (See Figure 19) (V /V IO 76 80 - 76 80 - dB Maximum Output Voltage (Note 4) V + 12 13 - 12 13 - V OM (See Figures 23, 24) V - -14 -14.4 - -14 -14.4 - V OM Maximum Output Voltage (Note 5) V 0.4 0.13 - 0.4 0.13 - V OM- Total Supply Current I+ - 8 12 - 8 12 mA (See Figure 15) For Both Amps Total Device Dissipation P - 240 360 - 240 360 mW D NOTES: 3. At V = 26V , +12V, -14V and R = 2k . O P-P L 4. At R = 2k . L 5. At V+ = 5V, V- = GND, I = 200 A. SINK o Electrical Specifications For Equipment Design, V = 15V, T = 25 C, Unless Otherwise Specified SUPPLY A TYPICAL VALUES PARAMETER SYMBOL TEST CONDITIONS CA3240A CA3240 UNITS Input Resistance R 1.5 1.5 T I Input Capacitance C 44 pF I Output Resistance R 60 60 O Equivalent Wideband Input Noise Voltage e BW = 140kHz, R = 1M 48 48 V N S (See Figure 2) FN1050 Rev 6.00 Page 2 of 15 March 4, 2005
