80C88 Data Sheet February 22, 2008 FN2949.4 CMOS 8-/16-Bit Microprocessor Features The Intersil 80C88 high performance 8-/16-bit CMOS CPU is Compatible with NMOS 8088 manufactured using a self-aligned silicon gate CMOS Direct Software Compatibility with 80C86, 8086, 8088 process (Scaled SAJI IV). Two modes of operation, 8-Bit Data Bus Interface 16-Bit Internal Architecture MINimum for small systems and MAXimum for larger applications such as multiprocessing, allow user Completely Static CMOS Design configuration to achieve the highest performance level. - DC . 5MHz (80C88) Full TTL compatibility (with the exception of CLOCK) and - DC 8MHz (80C88-2) industry-standard operation allow use of existing NMOS Low Power Operation 8088 hardware and Intersil CMOS peripherals. - ICCSB . 500A Maximum Complete software compatibility with the 80C86, 8086, and - ICCOP .10mA/MHz Maximum 8088 microprocessors allows use of existing software in new 1 Megabyte of Direct Memory Addressing Capability designs. 24 Operand Addressing Modes Bit, Byte, Word, and Block Move Operations 8-Bit and 16-Bit Signed/Unsigned Arithmetic Bus-Hold Circuitry Eliminates Pull-up Resistors Wide Operating Temperature Ranges - C80C88 0C to +70C - I80C88 -40C to +85C - M80C88 -55C to +125C Pb-Free Available (RoHS Compliant) Ordering Information TEMPERATURE PART NUMBER PART PART NUMBER PART RANGE (5MHz) MARKING (8MHz) MARKING (C) PACKAGE PKG. DWG. CP80C88 CP80C88 CP80C88-2 CP80C88-2 0 to +70 40 LD PDIP E40.6 IP80C88 IP80C88 IP80C88-2 IP80C88-2 -40 to +85 40 LD PDIP E40.6 MD80C88/B MD80C88/B -55 to +125 40 LD CERDIP F40.6 CP80C88Z CP80C88Z 0 to +70 40 LD PDIP* E40.6 (Note) (Pb-Free) NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Harris Corporation 1997, Copyright Intersil Americas Inc. 2004, 2008. All Rights Reserved All other trademarks mentioned are the property of their respective owners.80C88 Pinouts 80C88 (40 LD PDIP, 40 LD CERIDP) TOP VIEW MIN MAX MODE MODE GND 1 40 V CC A14 2 39 A15 A13 3 38 A16/S3 A12 4 37 A17/S4 A11 5 36 A18/S5 A10 6 35 A19/S6 A9 7 34 SS0 (HIGH) A8 8 33 MN/MX AD7 9 32 RD AD6 10 31 HOLD (RQ/GT0) AD5 11 30 HLDA (RQ/GT1) AD4 12 29 WR (LOCK) AD3 13 28 IO/M (S2) AD2 14 27 DT/R (S1) AD1 15 26 DEN (S0) AD0 16 25 ALE (QS0) NMI 17 24 INTA (QS1) INTR 18 23 TEST CLK 19 22 READY GND 20 21 RESET FN2949.4 2 February 22, 2008