CS82C52Z96 Renesas

DATASHEET 82C52 FN2950 Rev 4.00 CMOS Serial Controller Interface November 25, 2015 The Intersil 82C52 is a high performance programmable Features Universal Asynchronous Receiver/Transmitter (UART) and Single Chip UART/BRG Baud Rate Generator (BRG) on a single chip. Utilizing the Intersil advanced Scaled SAJI IV CMOS process, the 82C52 DC to 16MHz (1M Baud) Operation will support data rates up to 1M baud asynchronously with a Crystal or External Clock Input 16X clock (16MHz clock frequency). On-Chip Baud Rate Generator - 72 Selectable Baud Rates The on-chip Baud Rate Generator can be programmed for any Interrupt Mode with Mask Capability one of 72 different baud rates using a single industry standard crystal or external frequency source. A unique pre-scale divide Microprocessor Bus Oriented Interface circuit has been designed to provide standard RS-232-C baud 80C86 Compatible rates when using any one of three industry standard crystals (1.8432MHz, 2.4576MHz, or 3.072MHz). Single +5V Power Supply A programmable buffered clock output (CO) is available and Low Power Operation 1mA/MHz Typ can be programmed to provide either a buffered oscillator or Modem Interface 16X baud rate clock for general purpose system usage. Line Break Generation and Detection Operating Temperature Range: - C82C52 0C to +70C - I82C52 . -40C to +85C - M82C52 . -55C to +125C Pb-Free Plus Anneal Available (RoHS Compliant) Ordering Information TEMP 1M BAUD PART MARKING RANGE (C) PACKAGE PKG. DWG. CP82C52 CP82C52 0 to +70 PDIP E28.6 (No longer available or supported Recommended Replacement: CP82C52Z) CP82C52Z (Note) CP82C52Z 0 to +70 PDIP (Pb-Free)** E28.6 IP82C52 IP82C52 -40 to +85 PDIP E28.6 CS82C5296 CS82C52 0 to +70 PLCC (Tape & Reel) N28.45 CS82C52Z* CS82C52Z 0to +70 PLCC N28.45 (Note) (Pb-Free) IS82C52 IS82C52 -40 to +85 PLCC N28.45 IS82C52Z* IS82C52Z -40 to +85 PLCC N28.45 (Note) (Pb-Free) ID82C52 ID82C52 -40 to +85 CERDIP F28.6 MD82C52/B MD82C52/B -55 to +125 F28.6 8501501XA 8501501XA SMD F28.6 MR82C52/B -55 to +125 CLCC J28.A 85015013A 85015013A SMD J28.A *Add96 suffix for tape and reel. **Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. FN2950 Rev 4.00 Page 1 of 21 November 25, 201582C52 Pinouts 82C52 (PDIP, CERDIP) 82C52 (PLCC, CLCC) TOP VIEW TOP VIEW RD 1 28 CSO WR 2 27 VCC 4 3 2 1 28 27 26 D0 3 26 DR 25 SDI D2 5 25 SDI D1 4 D3 6 24 INTR D2 5 24 INTR D3 6 23 RST D4 7 23 RST D4 7 22 TBRE D5 8 22 TBRE D5 8 21 CO D6 9 21 CO D6 9 20 RTS D7 10 D7 10 19 DTR 20 RTS 18 A0 11 DSR A0 11 19 DTR A1 12 17 CTS 12 13 14 15 16 17 18 IX 13 16 GND OX 14 15 SDO Block Diagram UART 3 - 10 DATA CONTROL AND 22 BUS D0-D7 TBRE STATUS BUFFER 26 REGISTERS DR 1 RD 2 READ/WRITE WR CONTROL 11 A0 LOGIC TRANSMITTER TRANSMITTER 12 15 A1 SDO BUFFER REGISTER REGISTER P S 28 CSO 13 PROGRAM- IX 14 MABLE OX BOUD RATE 21 CO GENERATOR RECEIVER RECEIVER 25 BUFFER REGISTER SDI REGISTER P S 23 RST CONTROL 18 LOGIC DSR 24 INTR MODEM 17 CTS CONTROL AND 19 STATUS DTR REGISTERS 20 RTS FN2950 Rev 4.00 Page 2 of 21 November 25, 2015 INTERNAL DATA BUS A1 D1 D0 IX OX WR SDO RD GND CSO CTS VCC DSR DR