HD1-6402R/883 Renesas

TM HD-6402/883 CMOS Universal Asynchronous March 1997 Receiver Transmitter (UART) Features Description This Circuit is Processed in Accordance to MIL-STD- The HD-6402/883 is a CMOS UART for interfacing comput- 883 and is Fully Conformant Under the Provisions of ers or microprocessors to an asynchronous serial data chan- Paragraph 1.2.1. nel. The receiver converts serial start, data, parity and stop bits. The transmitter converts parallel data into serial form 8.0MHz Operating Frequency (HD-6402/883B) and automatically adds start, parity and stop bits. The data word length can be 5, 6, 7 or 8 bits. Parity may be odd or 2.0MHz Operating Frequency (HD-6402/883R) even. Parity checking and generation can be inhibited. The Low Power CMOS Design stop bits may be one or two or one and one-half when trans- mitting 5-bit code. Programmable Word Length, Stop Bits and Parity The HD-6402/883 can be used in a wide range of applica- Automatic Data Formatting and Status Generation tions including modems, printers, peripherals and remote Compatible with Industry Standard UARTs data acquisition systems. Utilizing the Intersil advanced scaled SAJI IV CMOS process permits operation clock fre- Single +5V Power Supply quencies up to 8.0MHz (500K Baud). Power requirements, CMOS/TTL Compatible Inputs by comparison, are reduced from 300mW to 10mW. Status logic increases flexibility and simplifies the user interface. Ordering Information PACKAGE TEMPERATURE RANGE 2MHz = 125K BAUD 8MHz = 500K BAUD PKG. NO. o o CERDIP -55 C to +125 C HD1-6402R/883 HD1-6402B/883 F40.6 Pinout HD-6402/883 (CERDIP) TOP VIEW VCC 1 40 TRC NC 2 39 EPE GND 3 38 CLS1 RRD 4 37 CLS2 RBR8 5 36 SBS RBR7 6 35 PI RBR6 7 34 CRL RBR5 8 33 TBR8 RBR4 9 32 TBR7 RBR3 10 31 TBR6 RBR2 11 30 TBR5 RBR1 12 29 TBR4 PE 13 28 TBR3 FE 14 27 TBR2 OE 15 26 TBR1 SFD 16 25 TRO RRC 17 24 TRE DRR 18 23 TBRL DR 19 22 TBRE RRI 20 21 MR CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. FN2953.1 1-888-INTERSIL or 321-724-7143 Intersil (and design) is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2002. All Rights Reserved 107HD-6402/883 Control Definition CONTROL WORD CHARACTER FORMAT CLS 2 CLS 1 PI EPE SBS START BIT DATA BITS PARITY BIT STOP BITS 0 00001 5 ODD 1 0 00011 5 ODD 1.5 0 00101 5 EVEN 1 0 00111 5 EVEN 1.5 00 1 X 0 1 5 NONE 1 00 1 X 1 1 5 NONE 1.5 0 10001 6 ODD 1 0 10011 6 ODD 2 0 10101 6 EVEN 1 0 10111 6 EVEN 2 01 1 X 0 1 6 NONE 1 01 1 x 1 1 6 NONE 2 1 00001 7 ODD 1 1 00011 7 ODD 2 1 00101 7 EVEN 1 1 00111 7 EVEN 2 10 1 X 0 1 7 NONE 1 10 1 x 1 1 7 NONE 2 1 10001 8 ODD 1 1 10011 8 ODD 2 1 10101 8 EVEN 1 1 10111 8 EVEN 2 11 1 X 0 1 8 NONE 1 11 1 x 1 1 8 NONE 2 108