Single, Low Voltage Digitally Controlled Potentiometer (XDCP) ISL23415 Features 256 resistor taps The ISL23415 is a volatile, low voltage, low noise, low power, SPI bus, 256 taps, single digitally controlled potentiometer SPI serial interface (DCP), which integrates DCP core, wiper switches and control - No additional level translator for low bus supply logic on a monolithic CMOS integrated circuit. - Daisy Chaining of multiple DCP The digitally controlled potentiometer is implemented with a Power supply combination of resistor elements and CMOS switches. The -V = 1.7V to 5.5V analog power supply position of the wipers are controlled by the user through the CC SPI bus interface. The potentiometer has an associated -V = 1.2V to 5.5V SPI bus/logic power supply LOGIC volatile Wiper Register (WR) that can be directly written to and Wiper resistance: 70 typical V = 3.3V CC read by the user. The contents of the WR controls the position Shutdown Mode - forces the DCP into an end-to-end open of the wiper. When powered on, the ISL23415s wiper will circuit and RW is shorted to RL internally always commence at mid-scale (128 tap position). Power-on preset to mid-scale (128 tap position) The low voltage, low power consumption, and small package of the ISL23415 make it an ideal choice for use in battery Shutdown and standby current <2.8A max operated equipment. In addition, the ISL23415 has a V LOGIC DCP terminal voltage from 0V to V CC pin allowing down to 1.2V bus operation, independent from the 10k, 50k or 100k total resistance V value. This allows for low logic levels to be connected CC directly to the ISL23415 without passing through a voltage Extended industrial temperature range: -40C to +125C level shifter. 10 Ld MSOP or 10 Ld TQFN packages The DCP can be used as a three-terminal potentiometer or as a Pb-free (RoHS compliant) two-terminal variable resistor in a wide variety of applications including control, parameter adjustments, and signal Applications processing. Power supply margining RF power amplifier bias compensation LCD bias compensation Gain adjustment in battery powered instruments Portable medical equipment calibration 10000 8000 6000 4000 2000 0 0 50 100 150 200 250 TAP POSITION (DECIMAL) FIGURE 1. FORWARD AND BACKWARD RESISTANCE vs TAP FIGURE 2. V ADJUSTMENT REF POSITION, 10k August 16, 2011 CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Copyright Intersil Americas Inc. 2010, 2011. All Rights Reserved FN7780.1 Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. RESISTANCE ( )ISL23415 Block Diagram V V CC LOGIC RH SCK POWER-UP INTERFACE, SDI I/O BLOCK LEVEL CONTROL WR SDO SHIFTER AND VOLATILE STATUS CS REGISTER LOGIC AND WIPER CONTROL CIRCUITRY RL RW GND Pin Configurations Pin Descriptions ISL23415 MSOP TQFN SYMBOL DESCRIPTION (10 LD MSOP) 110 V SPI bus/logic supply. TOP VIEW LOGIC Range 1.2V to 5.5V O 10 GND V 1 LOGIC 2 1 SCK Logic Pin - Serial bus clock input SCK 2 V 9 CC 3 2 SDO Logic Pin - Serial bus data output RH SDO 3 8 (configurable) 7 SDI 4 RW 4 3 SDI Logic Pin - Serial bus data input CS RL 5 6 5 4 CS Logic Pin - Active low Chip Select 65 RL DCP low terminal ISL23415 (10 LD TQFN) 76 RW DCP wiper terminal TOP VIEW 8 7 RH DCP high terminal 98 V Analog power supply. CC Range 1.7V to 5.5V O SCK 1 9 GND 10 9 GND Ground pin SDO 2 8 V CC SDI 3 7 RH CS 4 6 RW FN7780.1 2 August 16, 2011 RL 5 10 V LOGIC