DATASHEET ISL6123, ISL6124, ISL6125, ISL6126, ISL6127, ISL6128, FN9005 Rev 1.00 ISL6130 September 26, 2012 The Intersil ISL6123, ISL6124, ISL6125, ISL6126, ISL6127, Features ISL6128 and ISL6130 are integrated 4-channel controlled-on/controlled-off power-supply sequencers with Enables Arbitrary Turn-on and Turn-off Sequencing of Up to Four supply monitoring, fault protection and a sequence completed Power Supplies (0.7V to 5V) signal (RESET). For larger systems, more than four supplies can Operates From 1.5V to 5V Supply Voltage be sequenced by simply connecting a wire between the Supplies V +5.3V of Charge Pumped Gate Drive DD SYSRESET pins of cascaded ICs. The ISL6125 uses four active Adjustable Voltage Slew Rate for Each Rail open-drain outputs to control the on/off sequencing of four supplies. The other sequencers use a patented, micropower 7x Multiple Sequencers Can be Daisy-Chained to Sequence an charge pump to drive four external low-cost NFET switch gates Infinite Number of Independent Supplies above the supply rail by 5.3V. These ICs can be biased from 5V Glitch Immunity down to 1.5V by any supply. Undervoltage Lockout for Each Supply The 4-channel ISL6123 (ENABLE input), ISL6124 (ENABLE 1A Sleep State (ISL6123, ISL6130) input) and ISL6125 offer the designer 4-rail control when all Active High (ISL6123, ISL6130) ENABLE or Low (ISL6124, four rails must be in minimal compliance before turn-on and ISL6125, ISL6126, ISL6127, ISL6128) ENABLE Input during operation. The ISL6123 and ISL6130 have a low-power Active Open Drain Version Available (ISL6125) standby mode when disabled, which is suitable for battery-powered applications. Voltage-determined Sequence (ISL6126, ISL6130) Pre-programmed Sequence Available (ISL6127) The ISL6125 operates like the ISL6124, but instead of charge-pump-driven gate drive outputs, it has open-drain logic Dual Channel Groupings (ISL6128) outputs for direct interface to other circuitry. QFN Package In contrast, for the ISL6126 and ISL6130, each of the four Pb-free (RoHS-compliant) channels operates independently. Each GATE turns on once its individually associated input voltage requirements are met. Applications The ISL6127 is a pre-programmed A-B-C-D turn-on and D-C-B-A Graphics Cards turn-off sequenced IC. Once all inputs are in compliance and FPGA/ASIC/Microprocessor/PowerPC Supply Sequencing ENABLE is asserted, sequencing begins. Each subsequent GATE Network Routers turns on after the previous one turns on. Telecommunications Systems The ISL6128 has two groups of two channels, each with its independent I/O. It is ideal for voltage sequencing into V1 V1OUT redundant capability loads. All four inputs must be satisfied V2 V2OUT before turn-on, but a single group fault is ignored by the other group. V3 V3OUT External resistors provide flexible voltage threshold V4 V4OUT programming of monitored rail voltages. Delay and sequencing are provided by external capacitors for ramp-up and ramp-down. Additional I/O is provided for indicating and driving the RESET V DD state in various configurations. ENABLE UVLO A For volume applications, other programmable options and UVLO B SYSRST features are available. Contact Intersil sales support with your UVLO C RESET UVLO D needs. GROUND FIGURE 1. TYPICAL ISL6123 APPLICATION FN9005 Rev 1.00 Page 1 of 23 September 26, 2012 DLY ON A GATE D DLY OFF A DLY ON B GATE C DLY OFF B DLY ON C GATE B DLY OFF C DLY ON D GATE A DLY OFF DISL6123, ISL6124, ISL6125, ISL6126, ISL6127, ISL6128, ISL6130 Ordering Information PART NUMBER PACKAGE (Notes 1, 2, 3) PART MARKING TEMP. RANGE (C) (Pb-free) PKG. DWG. ISL6123IRZA 61 23IRZ -40 to +85 24 Ld 4x4 QFN L24.4x4 ISL6124IRZA 61 24IRZ -40 to +85 24 Ld 4x4 QFN L24.4x4 ISL6125IRZA 61 25IRZ -40 to +85 24 Ld 4x4 QFN L24.4x4 ISL6126IRZA 61 26IRZ -40 to +85 24 Ld 4x4 QFN L24.4x4 ISL6127IRZA 61 27IRZ -40 to +85 24 Ld 4x4 QFN L24.4x4 ISL6128IRZA 61 28IRZ -40 to +85 24 Ld 4x4 QFN L24.4x4 ISL6130IRZA 61 30IRZ -40 to +85 24 Ld 4x4 QFN L24.4x4 ISL6123EVAL1Z ISL6123 Evaluation Platform ISL6125EVAL1Z ISL6125 Evaluation Platform NOTES: 1. Add -T* suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL6123, ISL6124, ISL6125, ISL6126, ISL6127, ISL6128, ISL6130. For more information on MSL please see Tech Brief TB363. VDD+5V BIAS VDD P1 V1OUT LOCK OUT Q-PUMP S1 en P2 S2 V2OUT 1A en S3 V3OUT en 1A P3 S4 V4OUT DLY ONX en V DD 1.26V -1A 1A UVLO A SYSRST UVLO B ISL6125 RESET UVLO C ENABLE DLY OFFX UVLO D GROUND 10ms RISING DELAY 1.26V GATEX 30s FILTER UVLOX FIGURE 2. ISL6125 APPLICATION RESET LOGIC 0.633V 150ms RISING DELAY EN SYSRST FIGURE 3. ISL6123 BLOCK DIAGRAM (1/4) FN9005 Rev 1.00 Page 2 of 23 September 26, 2012 DLY ON A OUT D DLY OFF A DLY ON B OUT C DLY OFF B DLY ON C OUT B DLY OFF C DLY ON D OUT A DLY OFF D