ISL6140, ISL6150 Negative Voltage Hot Plug Controller ISL6140, ISL6150 Features Low Side External NFET Switch The ISL6140 is an 8 Ld, negative voltage hot plug controller that allows a board to be safely inserted and Operates from -10V to -80V (-100V absolute max removed from a live backplane. Inrush current is limited rating) or +10V to +80V (+100V absolute max rating) to a programmable value by controlling the gate voltage of an external N-channel pass transistor. The pass Programmable Inrush Current transistor is turned off if the input voltage is less than the Programmable Electronic Circuit Breaker undervoltage threshold, or greater than the overvoltage (overcurrent shutdown) threshold. A programmable electronic circuit breaker Programmable Overvoltage Protection protects the system against shorts. The active low Programmable Undervoltage Lockout PWRGD signal can be used to directly enable a power Power Good Control Output module (with a low enable input) - PWRGD Active High: (H Version) ISL6150 The ISL6150 is the same part, but with an active high - PWRGD active Low: (L Version) ISL6140 PWRGD signal. Pb-free available (RoHS compliant) Applications VoIP (Voice over Internet Protocol) Servers Telecom systems at -48V Negative Power Supply Control +24V Wireless Base Station Power Related Literature ISL6140/50EVAL1 Board Set, AN9967 ISL6116 Hot Plug Controller, FN9100 NOTE: See www.intersil.com/hotplug for more information. Typical Application (RL and CL are the Load) GND GND R = 18k (5%) C = 100F (100V) 3 L R 4 V DD UV PWRGD R 5 ISL6140 OV V SENSE GATE DRAIN R EE 6 (LOAD) C R 1 3 C 2 C R L 2 R L -48V IN R Q 1 1 -48V OUT R = 9.09k (1%) R = 562k (1%) 5 4 R = 10k (1%) C = 3.3nF (100V) 6 2 C = 150nF (25V) Q = IRF530 (100V, 17A, 0.11) 1 1 R = 10 (5%) R = 0.02 (1%) 2 1 April 29, 2010 CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Intersil (and design) is a registered trademark of Intersil Americas Inc. FN9039.4 Copyright Intersil Americas Inc. 2001, 2003, 2004, 2010. All Rights Reserved All other trademarks mentioned are the property of their respective owners.ISL6140, ISL6150 Pin Configuration ISL6140, ISL6150 (8 LD SOIC) TOP VIEW 1 8 V PWRGD/PWRGD DD OV 2 7 DRAIN UV 3 6 GATE V 4 5 EE SENSE ISL6140 has active Low (L version) PWRGD output pin ISL6150 has active High (H version) PWRGD output pin Ordering Information PART NUMBER TEMP. PKG. (Notes 2, 3) PART MARKING RANGE (C) PACKAGE DWG. ISL6140CBZ ISL61 40CBZ 0 to +70 8 Ld SOIC (Pb-Free) M8.15 ISL6140CBZ-T (Note 1) ISL61 40CBZ 0 to +70 8 Ld SOIC (Pb-Free) M8.15 ISL6140IBZ-T (Note 1) ISL61 40IBZ -40 to +85 8 Ld SOIC (Pb-Free) M8.15 ISL6140IBZ ISL61 40IBZ -40 to +85 8 Ld SOIC (Pb-Free) M8.15 ISL6150CB ISL 6150CB 0 to +70 8 Ld SOIC M8.15 ISL6150CBZ ISL61 50CBZ 0 to +70 8 Ld SOIC (Pb-Free) M8.15 ISL6150CBZ-T (Note 1) ISL61 50CBZ 0 to +70 8 Ld SOIC (Pb-Free) M8.15 ISL6150IB-T (Note 1) ISL 6150IB 0 to +70 8 Ld SOIC M8.15 ISL6150IBZ ISL61 50IBZ -40 to +85 8 Ld SOIC (Pb-Free) M8.15 ISL6150IBZ-T (Note 1) ISL61 50IBZ -40 to +85 8 Ld SOIC (Pb-Free) M8.15 NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page forISL6140. For more information on MSL please see techbrief TB363. PWRGD (ISL6150 H Version) Pin 1 Pin Description This digital output is a variation of an open-drain PWRGD (ISL6140 L Version) Pin 1 pull-down device. The power good comparator is the This digital output is an open-drain pull-down device. same as described above, but the polarity of the output The Power Good comparator looks at the DRAIN pin is reversed, as follows: voltage compared to the internal VPG reference (VPG is If the voltage drop across the FET is too large (>1.7V), nominal 1.7V) this essentially measures the voltage the open drain pull-down device will turn on, and sink drop across the external FET and sense resistor. If the current to the DRAIN pin. If the voltage drop is small voltage drop is small (<1.7V is normal), the PWRGD (<1.7V), a 2nd pull-down device in series with a 6.2k pin pulls low (to VEE) this can be used as an active resistor (nominal) sinks current to V if the external EE low enable for an external module. If the voltage drop pull-up current is low enough (<1mA, for example), is too large (>1.7V indicates some kind of short or the voltage drop across the resistor will be big enough overload condition), the pull-down device shuts off, to look like a logic high signal (in this example, and the pin becomes high impedance. Typically, an 1mA*6.2k = 6.2V). This pin can thus be used as an external pull-up of some kind is used to pull the pin active high enable signal for an external module. high (many brick regulators have a pull-up function built in). FN9039.4 2