DATASHEET ISL6161 FN9104 Rev.7.00 Dual Power Distribution Controller Aug 16, 2018 The ISL6161 is a hot swap dual supply power distribution Features controller that can be used in PCI Express (PCIe) applications. Hot swap dual power distribution and control for +12V and Two external N-channel MOSFETs are driven to distribute and +3.3V rails control power while providing load fault isolation. At turn-on, Provides fault isolation the gate of each external N-channel MOSFET is charged with a 10A current source. Capacitors on each gate create a Programmable current regulation level programmable ramp (soft turn-on) to control in-rush currents, Programmable timeout as Figure 1 shows. A built-in charge pump supplies the gate Charge pump allows the use of N-channel MOSFETs drive for the 12V supply N-channel MOSFET switch. Power-good and OC latch indicators Two external current sense resistors and FETs provide Adjustable turn-on ramp overcurrent (OC) protection. When the current through either resistor exceeds the user programmed value, the controller Protection during turn-on enters Current Regulation mode. The timeout capacitor, C , TIM Two levels of current limit detection provide fast response to starts charging as the controller enters the timeout period. varying fault conditions When C charges to a 2V threshold, both N-Channel TIM MOSFETs are latched off. In the event of a hard and fast fault 1s response time to dead short of at least three times the programmed current limit level, the 3s response time to 200% current overshoot N-channel MOSFET gates are pulled low immediately before Pb-free available (RoHS compliant) entering the timeout period. The controller is reset by a rising edge on the ENABLE pin. Applications The ISL6161 constantly monitors both output voltages and PCIe applications reports either one being low on the PGOOD output as a low. Power distribution and control The 12V PGOOD Voltage Threshold (Vth) is ~10.8V and the 3.3V Vth is ~2.85V nominally. Hot plug and hot swap components Related Literature For a full list of related documents, visit our website ISL6161 product information page C PUMP R SENSE R LOAD 12V ISL6161 OPTIONAL 12VISEN R 12VS ILIM C R GATE ILIM 12VG R FILTER V DD GND V DD C PUMP C FILTER ENABLE C TIM C INPUT ENABLE TIM 3.3V 3VG PGOOD 3.3V 3VS 3ISEN R C R SENSE LOAD GATE FIGURE 1. TYPICAL APPLICATION DIAGRAM FN9104 Rev.7.00 Page 1 of 14 Aug 16, 2018ISL6161 FN9104 Rev.7.00 Page 2 of 14 Aug 16, 2018 R TO LOAD SENSE 12VIN 12ISEN 12VS 12V R OC CLIM 100A + - 2R R 12VG ILIM FALLING - 10A EDGE + DELAY R ILIM 3X 18V ENABLE POR 18V V DD GND C GATE OPTIONAL R QN ENABLE QPUMP R V FILTER R DD Q S 12V TO V NC C C DD PUMP FILTER RISING C EDGE PUMP RESET 10 A 12V 100A ENABLE C TIM ENABLE 3X 12V C TIM FALLING + + C GATE - EDGE - + OC DELAY 10A LATCH CLIM 2V 2R 3VG PGOOD - - + PGOOD OC R OPTIONAL 3VS 3ISEN ISL6161 R SENSE TO LOAD 3.3VIN FIGURE 2. SIMPLIFIED SCHEMATIC (for 14 LD SOIC)