DATASHEET ISL6262A FN6343 Rev 1.00 Two-Phase Core Controller (Santa Rosa, IMVP-6+) December 23, 2008 The ISL6262A is a two-phase buck converter regulator Features implementing Intel IMVP-6+ protocol with embedded gate Precision Two/One-phase CORE Voltage Regulator drivers. The two-phase buck converter uses two interleaved - 0.5% System Accuracy Over-Temperature channels to effectively double the output voltage ripple - Enhanced Load Line Accuracy frequency, and thereby reduce output voltage ripple amplitude with fewer components lower component cost Internal Gate Driver with 2A Driving Capability reduced power dissipation and smaller real estate area. Dynamic Phase Adding/Dropping 3 The heart of the ISL6262A is the patented R Technology, Microprocessor Voltage Identification Input Intersils Robust Ripple Regulator modulator. Compared with 3 - 7-Bit VID Input the traditional multiphase buck regulator, the R - 0.300V to 1.500V in 12.5mV Steps Technology has the fastest transient response. This is due 3 - Support VID Change On-the-Fly to the R modulator commanding variable switching frequency during a load transient. Multiple Current Sensing Schemes Supported - Lossless Inductor DCR Current Sensing Intel Mobile Voltage Positioning (IMVP) is a smart voltage - Precision Resistive Current Sensing regulation technology, which effectively reduces power dissipation in Intel Pentium processors. To boost battery CPU Power Monitor life, the ISL6262A supports DPRSLPVR (deeper sleep), Thermal Monitor DPRSTP and PSI functions, and maximizes the efficiency via automatically enabling different phase operation modes. User Programmable Switching Frequency At heavy load operation of the active mode, the regulator Differential Remote CPU Die Voltage Sensing commands the two phase continuous conduction mode (CCM) operation. While the PSI is asserted with medium Static and Dynamic Current Sharing load in active mode, the ISL6262A smoothly disables one Overvoltage, Undervoltage, and Overcurrent Protection phase and operates in one-phase CCM. When the CPU Pb-Free (RoHS Compliant) enters deeper sleep mode, the ISL6262A enables diode emulation to maximize the efficiency at light load. Ordering Information For better system power management of the portable TEMP. computer, the ISL6262A also provides a CPU power monitor PART NUMBER PART RANGE PACKAGE PKG. output. The analog output at the power monitor pin can be (Note) MARKING (C) (Pb-Free) DWG. fed into an A/D converter to report instantaneous or average ISL6262ACRZ ISL6262 ACRZ -10 to +100 48 Ld 7x7 QFN L48.7x7 CPU power. ISL6262ACRZ-T* ISL6262 ACRZ -10 to +100 48 Ld 7x7 QFN L48.7x7 A 7-bit digital-to-analog converter (DAC) allows dynamic ISL6262AIRZ ISL6262 AIRZ -40 to +100 48 Ld 7x7 QFN L48.7x7 adjustment of the core output voltage from 0.300V to 1.500V. A 0.5% system accuracy of the core output voltage ISL6262AIRZ-T* ISL6262 AIRZ -40 to +100 48 Ld 7x7 QFN L48.7x7 over-temperature is achieved by the ISL6262A. *Please refer to TB347 for details on reel specifications. A unity-gain differential amplifier is provided for remote CPU NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and die sensing. This allows the voltage on the CPU die to be 100% matte tin plate plus anneal (e3 termination finish, which is RoHS accurately measured and regulated per Intel IMVP-6+ compliant and compatible with both SnPb and Pb-free soldering specifications. Current sensing can be realized using either operations). Intersil Pb-free products are MSL classified at Pb-free peak lossless inductor DCR sensing, or precision resistor sensing. reflow temperatures that meet or exceed the Pb-free requirements of A single NTC thermistor network thermally compensates the IPC/JEDEC J STD-020. gain and the time constant of the DCR variations. FN6343 Rev 1.00 Page 1 of 28 December 23, 2008ISL6262A Pinout ISL6262A (48 LD 7x7 QFN) TOP VIEW 48 47 46 45 44 43 42 41 40 39 38 37 1 36 PGOOD BOOT1 2 35 PSI UGATE1 3 34 PMON PHASE1 4 33 RBIAS PGND1 VR TT 5 32 LGATE1 6 31 NTC PVCC GND PAD (BOTTOM) 7 30 SOFT LGATE2 8 29 OCSET PGND2 VW PHASE2 9 28 COMP UGATE2 10 27 FB 11 26 BOOT2 FB2 12 25 NC 13 14 15 16 17 18 19 20 21 22 23 24 FN6343 Rev 1.00 Page 2 of 28 December 23, 2008 VDIFF 3V3 VSEN CLK EN RTN DPRSTP DROOP DPRSLPVR DFB VR ON VO VID6 VSUM VID5 VIN VID4 VID3 GND VID2 VDD VID1 ISEN2 VID0 ISEN1