DATASHEET ISL6377 FN8336 Rev 1.00 Multiphase PWM Regulator for AMD Fusion Desktop CPUs Using SVI 2.0 Nov 2, 2015 The ISL6377 is fully compliant with AMD Fusion SVI 2.0 and Features provides a complete solution for microprocessor and graphics Supports AMD SVI 2.0 serial data bus interface processor core power. The ISL6377 controller supports two Voltage Regulators (VRs) with three integrated gate drivers and - Serial VID clock frequency range 100kHz to 25MHz three optional external drivers for maximum flexibility. The Core Dual output controller with integrated drivers VR can be configured for 4-, 3-, 2-, or 1-phase operation while the - Two dedicated core drivers Northbridge VR supports 2- or 1-phase configurations. The two - One programmable driver for either core or Northbridge VRs share a serial control bus to communicate with the AMD CPU and achieve lower cost and smaller board area compared with Precision voltage regulation two-chip solutions. - 0.5% system accuracy over-temperature The PWM modulator is based on Intersils Robust Ripple - 0.5V to 1.55V in 6.25mV steps Regulator R3 technology. Compared to traditional modulators, - Enhanced load line accuracy the R3 modulator can automatically change switching frequency for faster transient settling time during load transients and Supports multiple current sensing methods improved light-load efficiency. - Lossless inductor DCR current sensing - Precision resistor current sensing The ISL6377 has several other key features. Both outputs support DCR current sensing with single NTC thermistor for Programmable 1-, 2-, 3- or 4-phase for the core output and DCR temperature compensation or accurate resistor current 1- or 2-phase for the Northbridge output sensing. Both outputs utilize remote voltage sense, adjustable Adaptive body diode conduction time reduction switching frequency, OC protection and power-good. Superior noise immunity and transient response Applications Output current and voltage telemetry AMD fusion CPU/GPU core power Differential remote voltage sensing Desktop computers High efficiency across entire load range Programmable slew rate Programmable VID offset and droop on both outputs Programmable switching frequency for both outputs Excellent dynamic current balance between phases Protection: OCP/WOC, OVP, PGOOD and thermal monitor Small footprint 48 Ld 6x6 QFN package - Pb-free (RoHS compliant) Core Performance 100 1.12 90 1.10 80 V = 8V IN 1.08 70 V = 12V IN 60 1.06 V = 8V IN 50 1.04 40 V = 12V 1.02 IN 30 1.00 20 10 0.98 V CORE = 1.1V OUT V CORE = 1.1V OUT 0 0.96 0 5 10 15 20 25 30 35 40 45 50 55 0 5 10 15 20 25 30 35 40 45 50 55 I (A) I (A) OUT OUT FIGURE 2. V vs LOAD FIGURE 1. EFFICIENCY vs LOAD OUT FN8336 Rev 1.00 Page 1 of 37 Nov 2, 2015 EFFICIENCY (%) V (A) OUTISL6377 Table of Contents Simplified Application Circuit for High Power CPU Core . 3 CCM Switching Frequency 20 AMD Serial VID Interface 2.0 20 Simplified Application Circuit with 3 Internal Drivers Used for Core . 4 Pre-PWROK Metal VID . 20 SVI Interface Active . 21 Simplified Application Circuit for Mid-Power CPUs VID-on-the-Fly Transition . 21 3+1 Configuration . 5 SVI Data Communication Protocol . 21 Block Diagram 6 SVI Bus Protocol 24 Power States . 24 Pin Configuration 7 Dynamic Load Line Slope Trim 25 Pin Descriptions . 7 Dynamic Offset Trim . 25 Telemetry . 25 Absolute Maximum Ratings 10 Protection Features 25 Thermal Information 10 Overcurrent 25 Recommended Operating Conditions .10 Current Balance 26 Electrical Specifications 10 Undervoltage . 26 Overvoltage 26 Gate Driver Timing Diagram 12 Thermal Monitor NTC, NTC NB . 26 Theory of Operation .13 Fault Recovery 27 Interface Pin Protection 27 Multiphase R3 Modulator . 13 Diode Emulation and Period Stretching . 14 Key Component Selection . 27 Channel Configuration . 14 Inductor DCR Current-Sensing Network 27 Power-On Reset . 14 Resistor Current-Sensing Network . 29 Start-Up Timing . 15 Overcurrent Protection . 29 Voltage Regulation and Load Line Implementation . 15 Load Line Slope 30 Differential Sensing 16 Compensator . 30 Phase Current Balancing . 16 Current Balancing . 31 Modes of Operation 18 Thermal Monitor Component Selection . 31 Dynamic Operation 19 Adaptive Body Diode Conduction Time Reduction 19 Layout Guidelines 32 PCB Layout Considerations . 32 Resistor Configuration Options .19 VR Offset Programming 19 Revision History . 36 Floating DriverX and PWM Y Configuration 19 About Intersil 36 VID-on-the-Fly Slew Rate Selection . 20 FN8336 Rev 1.00 Page 2 of 37 Nov 2, 2015