DATASHEET ISL78206 FN8618 Rev 2.00 40V 2.5A Buck Controller with Integrated High-side MOSFET March 25, 2015 The ISL78206 is an AEC-Q100 qualified 40V, 2.5A synchronous Features buck controller with a high-side MOSFET and low-side driver Ultra wide input voltage range 3V to 40V (refer to Input integrated. The ISL78206 supports a wide input voltage range Voltage on page 12 for more details) from 3V to 40V, output current up to 2.5A, and can be operated in synchronous and non-synchronous buck Less than 5A (max) shutdown input current (IC disabled) topologies. The ISL78206 provides a low system cost, high Temperature range -40C to +105C efficiency, single part buck solution for automotive Integrated high-side MOSFET applications for a wide variety of input voltages. For vehicle systems that must be kept powered during cold-cranking or Operational topologies start-stop operation, the ISL78206 can be replaced by its -Synchronous buck pin-to-pin alternative, the ISL78201 which offers boost-buck -Non-synchronous buck operation. Together, these devices offer two functional alternatives on the same PCB layout, providing convenience, Programmable frequency from 200kHz to 2.2MHz and flexibility, and facilitating extensive design reuse. frequency synchronization capability The ISL78206 offers the most robust current protections. It 1% tight voltage regulation accuracy uses peak current mode control with cycle-by-cycle current Reliable cycle-by-cycle overcurrent protection limiting. It is implemented with frequency foldback - Temperature compensated current sense undercurrent limit conditions. In addition, the hiccup - Frequency foldback overcurrent mode is also implemented to guarantee reliable - Programmable OC limit operations under harsh short conditions. - Hiccup mode protection in worst case short condition The ISL78206 has comprehensive protections against various faults, including overvoltage, undervoltage, programmable 20 Ld HTSSOP package, pin-to-pin compatible with overcurrent and over-temperature. Built-in soft-start allows the ISL78201 boost buck IC to start-up smoothly and is reactivated during hiccup mode AEC-Q100 qualified fault recovery. Pb-free (RoHS compliant) Applications Automotive applications General purpose power regulator 24V bus power Battery power Embedded processor and I/O supplies 100 6V 95 VIN V PGOOD IN 90 EN 12V 85 SYNC 80 24V BOOT FS 75 40V 70 VCC V OUT ISL78206 PHASE 65 ILIMIT 60 LGATE SS 55 50 PGND 45 FB DGND 40 SGND COMP 35 30 0.0 0.5 1.0 1.5 2.0 2.5 LOAD CURRENT (A) FIGURE 1. TYPICAL APPLICATION SCHEMATIC I - SYNCHRONOUS FIGURE 2. EFFICIENCY, SYNCHRONOUS BUCK, 500kHz, V 5V, OUT BUCK T = +25C A FN8618 Rev 2.00 Page 1 of 19 March 25, 2015 EFFICIENCY (%)ISL78206 Pin Configuration ISL78206 (20 LD HTSSOP) TOP VIEW PGND 1 20 LGATE BOOT 2 19 SYNC VIN 3 18 NC VIN 4 17 PHASE SGND 5 21 16 PHASE PAD VCC 6 15 PGOOD NC 7 14 DGND EN 8 13 ILIMIT FS 9 12 COMP SS 10 11 FB Functional Pin Description PIN NAME PIN DESCRIPTION PGND 1 This pin is used as the ground connection of the power flow, including the driver. BOOT 2 This pin provides bias voltage to the high-side MOSFET driver. A bootstrap circuit is used to create a voltage suitable to drive the internal N-channel MOSFET. The boot charge circuitries are integrated inside of the IC. No external boot diode is needed. A 1F ceramic capacitor is recommended to be used between the BOOT and PHASE pin. VIN 3, 4 Connect the input rail to these pins that are connected to the drain of the integrated high-side MOSFET, as well as the source for the internal linear regulator that provides the bias of the IC. With the part switching, the operating input voltage applied to the VIN pins must be under 40V. This recommendation allows for short voltage ringing spikes (within a couple of ns time range) due to switching while not exceeding Absolute Maximum Ratings. SGND 5 This pin provides the return path for the control and monitor portions of the IC. VCC 6 This pin is the output of the internal linear regulator that supplies the bias for the IC, including the driver. A minimum 4.7F decoupling ceramic capacitor is recommended between VCC to ground. EN 8 The controller is enabled when this pin is pulled HIGH or left floating. The IC is disabled when this pin is pulled LOW. Range: 0V to 5.5V. FS 9 Tying this pin to VCC, or GND, or leaving it open will force the IC to have 500kHz switching frequency. The oscillator switching frequency can also be programmed by adjusting the resistor from this pin to GND. SS 10 Connect a capacitor from this pin to ground. This capacitor, along with an internal 5A current source, sets the soft-start interval of the converter. Also, this pin can be used to track a ramp on this pin. FB 11 This pin is the inverting input of the voltage feedback error amplifier. With a properly selected resistor divider connected from V to FB, the output voltage can be set to any voltage between the input rail (reduced by maximum duty cycle and voltage OUT drop) and the 0.8V reference. Loop compensation is achieved by connecting an RC network across COMP and FB. The FB pin is also monitored for overvoltage events. COMP 12 Output of the voltage feedback error amplifier. ILIMIT 13 Programmable current limit pin. With this pin connected to VCC pin, or to GND, or left open, the current limit threshold is set to a default of 3.6A the current limit threshold can be programmed with a resistor from this pin to GND. DGND 14 Digital ground pin. Connect to SGND at quiet ground copper plane. PGOOD 15 PGOOD is an open drain output and pull up this pin with a resistor to VCC for proper function. PGOOD will be pulled low under the events when the output is out of regulation (OV or UV) or EN pin is pulled low. PGOOD rising has a fixed 128 cycles delay. PHASE 16, 17 These pins are the PHASE nodes that should be connected to the output inductor. These pins are connected to the source of the high side N-channel MOSFET. SYNC 19 This pin can be used to synchronize two or more ISL78206 controllers. Multiple ISL78206s can be synchronized with their SYNC pins connected together. 180 degree phase shift is automatically generated between the master and slave ICs. The internal oscillator can also lock to an external frequency source applied to this pin with square pulse waveform (with frequency 10% higher than the ICs local frequency, and pulse width higher than 150ns). This pin should be left floating if not used. FN8618 Rev 2.00 Page 2 of 19 March 25, 2015