USERS MANUAL ISL78268EVAL1Z AN1946 Rev 0.00 Evaluation Board User July 7, 2014 Introduction Key Features ISL78268 is an automotive grade synchronous buck controller Wide operational input voltage range up to 55V (switching), with the 2-A sourcing/3-A sinking Integrated MOSFET Drivers. withstand 60V (non-switching) The device supports the wide input supply voltage range of 5V Average output constant current limiting to 55V for full operation and protected up to 60V when not Selectable diode emulation mode or forced PWM mode switching. The ISL78268EVAL1Z is a fully configured buck converter evaluation board with ISL78268, MOSFETS, an Selectable switching clock source: internal or external inductor, current sense resistors and other necessary Low shutdown current: I <10A Q components. The evaluation board has been designed to Selectable latch-off or hiccup mode fault response quickly evaluate the various features and performance of the ISL78268. Comprehensive fault protections: - Input and output overvoltage protection Specification (Default Setting) - Cycle-by-cycle overcurrent limit (OC1) and protection (OC2) V = 14V to 55V IN - Average current overcurrent protection V = 12V OUT - Over-temperature protection V overvoltage protection = 58V (rising threshold to trigger IN Monitor test points for key signals hiccup or latch-off) Output overcurrent limit 1 (OC1: cycle-by-cycle) = 9.3A Reference Output overcurrent limit 2 (OC2: hiccup/latch-off) = 12.4A ISL78268 Datasheet Output average constant current limit = 4.05A (if activated) Switching frequency = 300kHz Ordering Information Peak efficiency > 95% (V = 15V/ I = 4A) IN OUT PART NUMBER DESCRIPTION ISL78268EVAL1Z ISL78268 Evaluation Board J12: VCC J1: VIN J28 J4 J9 VCC VIN J2: GND ISEN1P J10: EN EN ISEN1N J16 IMON/DE: VCC PVCC J21: PVCC V = FORCED PWM MODE CC J11: IMON/DE W/O ACL IMON/DE J8: IMON/DE GND = DE MODE W/O ACL BOOT 0V~2V = DE MODE W/ ACL J20: PHASE UG J17: FSYNC FSYNC J15 J26: VOUT ISL78268 PLL COMP PH J24 LG J18 J7: COMP COMP ISEN2P J27: GND J22 SLOPE ISEN2N VCC J23 HIC/LATCH : CONNECT TO J5: FB V FOR LATCH-OFF FB CC J13: HIC/LATCH HIC/LATCH MODE OR GND FOR VCC HICCUP MODE J14: PGOOD PGOOD J6: SS SS CLKOUT SGND PGND J19: CLKOUT FIGURE 1. ISL78268EVAL1Z BLOCK DIAGRAM AN1946 Rev 0.00 Page 1 of 16 July 7, 2014ISL78268EVAL1Z limited by the minimum on time of high-side MOSFET Functional Description (t ) which is 300ns(typ). MINON UG The ISL78268 is a high voltage synchronous buck controller with The operation mode of DE mode or Forced PWM mode is integrated 2A source/3A sink MOSFET drivers. The device selectable by the connection of IMON/DE pins. operates over a wide input voltage range, 5V to 55V, and The fault response of hiccup or latch-off is selected by the withstands up to 60V. The full synchronous operation of connection of HIC/LATCH pin. ISL78268 enables high conversion efficiency in continuous conduction mode. Also, the device provides Diode Emulation The average output current limit can be adjusted by replacing mode (DE mode) for efficiency improvement in light load the resistor connected to IMON/DE pin (R ). For the setting of 4 operation. The ISL78268 also provides comprehensive the average current limit, please refer to Current Sensing and protection features of input and output overvoltage, Average Constant Current Control sections in the ISL78268 cycle-by-cycle peak current limiting, average output current datasheet. limiting and thermal protection. The cycle-by-cycle peak current limit can be changed by The ISL78268EVAL1Z evaluation board is shown in Figures 2 replacing the current sense resistor (R ) and/or gain set 10 and 3. The board supports quick evaluation of various features of resistor (R +R ). Please refer to Current Sensing and Cycle- 8 9 the ISL78268. The ISL78268EVAL1Zs default configuration is by-Cycle Peak Overcurrent Limiting/Protection sections in for 12V at VOUT, with a peak current limit (OC1: cycle-by-cycle) of ISL78268 datasheet for the detailed relation between R 10 9.3A, peak current protection (OC2: hiccup/ latch-off) 12.4A, and and/or R +R and peak current limit. 8 9 an average current limit of 4A. The operation mode of DE mode or Forced PWM mode is PCB Layout Guideline selectable by the connection of IMON/DE pins. The fault The ISL78268EVAL1Z layout is optimized for electrical and response of hiccup or latch-off is selected by the connection of thermal performances. Key considerations are: HIC/LATCH pin. Voltage or waveforms of key signals such as VCC, SS, FB, COMP, EN, CLKOUT, PH etc., are pulled out to the monitor Most of switching nodes are patterned on the top layer with shows more details of pins for easy measurement. Table 1 simple and short routing. connector/monitor-pin descriptions. 4x4 pattern of 300m vias under the ISL78268 thermal pad Figure 4 shows the schematics of this evaluation board and are connected to large copper GND planes (layers 2, 3 and 4) Table 3 shows its BOM list. The layout information of the board for effective thermal performances. are shown in Figures 5 through 10. Maximize the copper layers of the Power Transistor Drain node by connecting each layers with multiple via for the effective Figures 11 through 24 show the performance data taken with thermal performances. this evaluation board with default configuration. Place the input ceramic capacitor as close as possible to the Operating Range VIN pin. The default configuration is shown in Specification (Default Place the ceramic capacitor as close as possible to minimize Setting) on page 1. the ringing associated by the parasitic inductance and capacitance in the high current transition loop. The board setting can be changed by changing the connections Keep the traces of current sense lines symmetric as much as of setting pins or replacing the resistors and/or capacitors populated on the board. Some examples are described as possible to avoid the offset and noise injection. follows: The board size is 2.65 in. x 2.85 in. with 4-layers and 2oz copper. The switching frequency on the ISL78268EVAL1Z is fixed at 300kHz. To change the frequency, replace the R which is 18 connected between FSYNC and GND. Please refer to the Internal Clock Frequency Setting section in Datasheet for detail. Also, the clock can be synchronized with the external clock source by input square wave at FSYNC pin. The external clock frequency range will be 50kHz to 1.1MHz. The output voltage of ISL78268EVAL1Z is fixed at 12V in default setting. This can be changed by replacing feedback resistor R . When changing the feedback resistor, the 1 minimum input voltage on the board will be changed accordingly. If changing the output voltage, be careful because the minimum input voltage will be limited by the high-side MOSFET minimum off time (t ) of the ISL78268, MINOFF UG which is 285ns (typ). Also, the maximum input voltage will be AN1946 Rev 0.00 Page 2 of 16 July 7, 2014