DATASHEET ISL9305H FN7724 2 Rev 2.00 3MHz Dual 1.5A Step-Down Converters and Dual Low-Input LDOs with I C March 7, 2014 Compatible Interface The ISL9305H is an integrated mini Power Management IC Features (mini-PMIC) for powering low-voltage microprocessors, or Dual 1.5A, Synchronous Step-down Converters and Dual applications using a single Li-Ion or Li-Polymer cell battery to 300mA, General-purpose LDOs power multiple voltage rails. The ISL9305H integrates two high-efficiency 3MHz synchronous step-down converters (DCD1 Input Voltage Range and DCD2) and two low-input, low-dropout linear regulators - DCD1/DCD2 2.5V to 5.5V (LDO1 and LDO2). - LDO1/LDO2 1.5V to 5.5V The 3MHz PWM switching frequency allows the use of very 2 400kb/s I C-Bus Series Interface Transfers the Control Data small external inductors and capacitors. Both step-down Between the Host Controller and the ISL9305H converters can enter skip mode under light load conditions to Adjustable Output Voltage further improve the efficiency and maximize the battery life. - VODCD1/VODCD2 0.8V to V For noise sensitive applications, they can also be programmed IN 2 through I C interface to operate in forced PWM mode 2 Fixed Output I C Programmability 2 regardless of the load current condition. The I C interface - At 25mV/Step 0.825V to 3.6V supports on-the-fly slew rate control of the output voltage from 2 0.825V to 3.6V at 25mV/step size for dynamic power saving. LDO1/LDO2 Output Voltage I C Programmability Each step-down converter can supply up to 1.5A load current. - At 50mV/Step 0.9V to 3.6V The default output voltage can be set from 0.8V to VIN using 50 A I (Typ) with DCD1/DCD2 in Skip Mode 20A I (Typ) external feedback resistors on the adjustable version, or the Q Q for Each Enabled LDO ISL9305H can be ordered in factory pre-set voltage options 2 from 0.9V to 3.6V in 50mV step. On-the-fly I C Programming of DC/DC and LDO Output Voltages The ISL9305H also provides two 300mA low dropout (LDO) 2 regulators. The input voltage range is 1.5V to 5.5V allowing them DCD1/DCD2 I C Programmable Skip Mode Under Light to be powered from one of the on-chip step-down converters or Load or Forced Fixed Switching Frequency PWM Mode directly from the battery. The default LDO output comes with Small, Thin 4mmx4mm TQFN Package factory pre-set fixed output voltage options between 0.9V to 3.3V. Applications The ISL9305H is available in a 4mmx4mm 16 Ld TQFN package. Cellular Phones, Smart Phones Related Literature PDAs, Portable Media Players, Portable Instruments FN7605, ISL9305 Data Sheet Single Li-Ion/Li-Polymer Battery-Powered Equipment AN1564 ISL9305 and ISL9305H Evaluation Boards DSP Core Power L = 1.5H 1 1.5A PG SW1 2.5V TO 5.5V VINDCD1 R * 1 C 4 R VINDCD2 FB1 2 10F C 10 10F L = 1.5H 2 1.5A SDAT SW2 SCLK ISL9305H * 1.5V TO 5.5V R C 3 5 R VINLDO1 FB2 4 10F C 2 1F 300mA 1.5V TO 5.5V VOLDO1 VINLDO2 300mA VOLDO2 C 3 C C 1F 6 7 GNDDCD1 GNDDCD2 GNDLDO 1F 1F *Only for adjustable output version. For fixed output version, directly connect the FB pin to the output of the buck converter. FIGURE 1. TYPICAL APPLICATION DIAGRAM FN7724 Rev 2.00 Page 1 of 17 March 7, 2014ISL9305H TABLE 1. TYPICAL APPLICATION PARTS LIST PARTS DESCRIPTION MANUFACTURER PART NUMBER SPECIFICATIONS SIZE L1, L2 Inductor Sumida CDRH2D14NP-1R5 1.5H/1.80A/50m 3.0mmx3.0mmx1.55mm C1 Input capacitor Murata GRM21BR60J106KE19L 10F/6.3V 0805 C2, C3 Intput capacitor Murata GRM185R60J105KE26D 1F/6.3V 0603 C4, C5 Output capacitor Murata GRM21BR71A106KE51L 10F/6.3V 0805 C6, C7 Output capacitor Murata GRM185R60J105KE26D 1F/6.3V 0603 R1, R2, Resistor Various 1%, SMD, 0.1W 0603 R3, R4 Pin Configuration ISL9305H (16 LD 4x4 TQFN) TOP VIEW 16 15 14 13 VINDCD1 1 12 VINDCD2 2 11 FB1 FB2 E-PAD 3 10 DCDPG SCLK 4 9 SDAT GNDLDO 56 78 Pin Descriptions PIN NUMBER (TQFN) NAME DESCRIPTION 1 VINDCD1 Input voltage for buck converter DCD1 and it also serves as the power supply pin for the whole internal digital/analog circuits. 2 FB1 Feedback pin for DCD1, connect external voltage divider resistors between DCDC1 output, this pin and ground. For fixed output versions, connect this pin directly to the DCD1 output. 2 3SCLK I C interface clock pin. 2 4SDAT I C interface data pin. 5 VINLDO1 Input voltage for LDO1. 6VOLDO1 Output voltage of LDO1. 7VOLDO2 Output voltage of LDO2. 8 VINLDO2 Input voltage for LDO2. 9 GNDLDO Power ground for LDO1 and LDO2. 10 DCDPG The DCDPG pin is an open-drain output to indicate the state of the DCD1/DCD2 output voltages. When both DCD1 and DCD2 are enabled, the output is released to be pulled high by an external pull-up resistor if both converter voltages are within the power good range. The pin will be pulled low if either DCD is outside their range. When only one DCD is enabled, the state of the enabled DCDs output will define the state of the DCDPG pin. The DCDPG state can be programmed for a delay of up to 200ms before being released to rise high. The programming range is 2 1ms~200ms through the I C interface. FN7724 Rev 2.00 Page 2 of 17 March 7, 2014 VINLDO1 SW1 VOLDO1 GGNDDCD1NDCDC1 VOLDO2 GNDDCD2 VINLDO2 SW2