DATASHEET ISL95810 FN8090 2 Rev.3.01 Single Digitally Controlled Potentiometer (XDCP) Low Noise, Low Power I C Jun 5, 2020 Bus, 256 Taps The ISL95810 integrates a digitally controlled potentiometer Features (XDCP) on a monolithic CMOS integrated circuit. 256 resistor taps - 0.4% resolution The digitally controlled potentiometer is implemented with a 2 I C serial interface combination of resistor elements and CMOS switches. The 2 position of the wiper is controlled by you through the I C bus Wiper resistance: 70 typical at 3.3V interface. The potentiometer has an associated volatile Non-volatile storage of wiper position Wiper Register (WR) and a non-volatile Initial Value Register Standby current 5A max (IVR) that can be directly written to and read. The content of the WR controls the position of the wiper. At power-up, the Power supply: 2.7V to 5.5V device recalls the contents of the DCPs IVR to the WR. 50k, 10k total resistance The DCP can be used as a 3-terminal potentiometer or as a High reliability 2-terminal variable resistor in a wide variety of applications - Endurance: 200,000 data changes per bit per register including control, parameter adjustments, and signal - Register data retention: 50 years at T +75C processing. 8 Ld MSOP and 8 Ld TDFN packaging Related Literature Pb-free plus anneal available (RoHS compliant) For a full list of related documents, visit our website: ISL95810 device page VCC RH SDA WIPER REGISTER 2 I C AND SCL RW CONTROL NON-VOLATILE WP REGISTER RL GND FIGURE 1. BLOCK DIAGRAM FN8090 Rev.3.01 Page 1 of 14 Jun 5, 2020ISL95810 Ordering Information PART NUMBER PART TAPE AND REEL TEMP PACKAGE (Notes 2, 3) MARKING R (k) (UNITS) (Note 1) RANGE (C) (RoHS Compliant) TOTAL ISL95810WIU8Z APN 10 - -40 to +85 8 Ld MSOP ISL95810WIU8Z-T APN 2.5k -40 to +85 8 Ld MSOP ISL95810WIRT8Z APO - -40 to +85 8 Ld 3x3 TDFN ISL95810WIRT8Z-T APO 6k -40 to +85 8 Ld 3x3 TDFN ISL95810UIU8Z AOK 50 - -40 to +85 8 Ld MSOP ISL95810UIU8Z-T AOK 2.5k -40 to +85 8 Ld MSOP ISL95810UIRT8Z APP - -40 to +85 8 Ld 3x3 TDFN ISL95810UIRT8Z-T APP 2.5k -40 to +85 8 Ld 3x3 TDFN ISL95810UART8Z-T ADR 2.5k -40 to +105 8 Ld 3x3 TDFN NOTES: 1. See TB347 for details on reel specifications. 2. Pb-free plus anneal products employ special Pb-free material sets molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J-STD-020. 3. For Moisture Sensitivity Level (MSL), see the ISL95810 device page. For more information about MSL, see TB363. Pinouts 8 LD MSOP 8 LD TDFN TOP VIEW TOP VIEW 8 WP 1 V CC V 1 8 WP CC 7 2 SCL RH 2 7 6 SCL RH 3 RL SDA 3 6 GND 4 5 RW SDA RL GND 4 5 RW Pin Descriptions TSSOP PIN SYMBOL DESCRIPTION 2 1WP Hardware write protection. Active low. Prevents any Write operation of the I C interface. 2 2SCLI C interface clock 2 3 SDA Serial data I/O for the I C interface 4 GND Ground 5 RW Wiper terminal of the DCP 6 RL Low terminal of the DCP 7 RH High terminal of the DCP 8V Power supply CC FN8090 Rev.3.01 Page 2 of 14 Jun 5, 2020