DATASHEET ISLA222P FN7853 Rev 1.00 Dual 12-Bit, 250MSPS/200MSPS/130MSPS ADC June 17, 2011 The ISLA222P is a family of dual-channel 12-bit Features analog-to-digital converters. Designed with Intersils Single Supply 1.8V Operation proprietary FemtoCharge technology on a standard CMOS process, the family supports sampling rates of up to Clock Duty Cycle Stabilizer 250MSPS. The ISLA222P is part of a pin-compatible portfolio 75fs Clock Jitter of 12-bit and 14-bit dual-channel A/Ds with maximum sample 700MHz Bandwidth rates ranging from 130MSPS to 250MSPS. Programmable Built-in Test Patterns A serial peripheral interface (SPI) port allows for extensive configurability, as well as fine control of various parameters Multi-ADC Support such as gain and offset. - SPI Programmable Fine Gain and Offset Control Digital output data is presented in selectable LVDS or CMOS - Support for Multiple ADC Synchronization formats. The ISLA222P is available in a 72 lead QFN package - Optimized Output Timing with an exposed paddle. Operating from a 1.8V supply, Nap and Sleep Modes performance is specified over the full industrial temperature - 200s Sleep Wake-up Time range (-40C to +85C). Data Output Clock Key Specifications DDR LVDS-Compatible or LVCMOS Outputs SNR 250/200/130MSPS User-accessible Digital Temperature Monitor 70.3/71.0/71.3dBFS f = 30MHz IN Applications 68.5/68.8/68.4dBFS f = 363MHz IN SFDR 250/200/130MSPS Radar Array Processing 85/87/86dBc f = 30MHz IN Software Defined Radios 73/75/80dBc f = 363MHz IN Broadband Communications Total Power Consumption = 823mW 250MSPS High-Performance Data Acquisition Communications Test Equipment Pin-Compatible Family SPEED MODEL RESOLUTION (MSPS) ISLA224P20 14 200 CLKP CLKOUTP CLOCK MANAGEMENT CLKN CLKOUTN ISLA224P13 14 130 ISLA222P25 12 250 12-BIT VINBP D 11:0 P 250 MSPS SHA ISLA222P20 12 200 VINBN ADC D 11:0 N ORP VREF ISLA222P13 12 130 DIGITAL ORN VCM ERROR CORRECTION OUTFMT OUTMODE VINAN 12-BIT SHA 250 MSPS VINAP ADC VREF SPI + 1.25V + - CONTROL Pin-Compatible Family SPEED MODEL RESOLUTION (MSPS) ISLA224P25 14 250 FN7853 Rev 1.00 Page 1 of 33 June 17, 2011 AVSS AVDD NAPSLP RESETN CLKDIV CLKDIVRSTP CLKDIVRSTN CSB SCLK SDIO SDO OVSS OVDDISLA222P Pin Configuration - LVDS Mode ISLA222P (72 LD QFN) TOP VIEW 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 DNC 1 54 D1P DNC 2 53 D1N 3 52 NAPSLP D2P 4 51 VCM D2N 5 50 AVSS D3P 6 49 VINBP D3N 7 48 VINBN CLKOUTP AVSS 8 47 CLKOUTN 9 46 AVDD RLVDS 10 45 AVDD OVSS 11 44 AVSS D4P 12 43 VINAN D4N 13 42 VINAP D5P 14 41 AVSS D5N 15 40 CLKDIV D6P 16 IPTAT 39 D6N Thermal Pad Not Drawn to Scale. Consult Mechanical Drawing for 17 38 DNC D7P Physical Dimensions Connect Thermal Pad to AVSS RESETN 18 37 D7N 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Pin Descriptions - 72 Ld QFN, LVDS Mode PIN NUMBER LVDS PIN NAME LVDS PIN FUNCTION 1, 2, 17, 57, 58, 59, 60 DNC Do Not Connect 9, 10, 19, 20, 21, 70, 71, 72 AVDD 1.8V Analog Supply 5, 8, 11, 14 AVSS Analog Ground 27, 32, 62 OVDD 1.8V Output Supply 26, 45, 61, 65 OVSS Output Ground 3 NAPSLP Tri-Level Power Control (Nap, Sleep modes) 4 VCM Common Mode Output 6, 7 VINBP, VINBN Channel B Analog Input Positive, Negative 12, 13 VINAN, VINAP Channel A Analog Input Negative, Positive FN7853 Rev 1.00 Page 2 of 33 June 17, 2011 AVDD AVDD AVDD AVDD AVDD AVDD CLKP SDIO CLKN SCLK CLKDIVRSTP CSB CLKDIVRSTN SDO OVSS OVSS OVDD ORP D11N ORN D11P OVDD D10N OVSS D10P DNC OVDD DNC D9N DNC D9P DNC D8N D0P D8P D0N